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    Hot plug computer system protection circuit
    2.
    发明公开
    Hot plug computer system protection circuit 失效
    Schutzschaltungfürunter Spannung einsteckbares Rechnersystem

    公开(公告)号：EP0802487A2

    公开(公告)日：1997-10-22

    申请号：EP97302535.6

    申请日：1997-04-14

    Applicant: Compaq Computer Corporation

    Inventor： Sides, Chi Kim ,  McKenzie, Philip J. ,  Basile, Barry S.

    IPC: G06F13/40

    CPC classification number: G06F13/4081 ,  H02H9/004

    Abstract: A protection circuit 116 for a computer system 110 having PCI expansion cards 120 and PCI expansion slots 118 with multiple power rails 312,322;314,328;318,324;320,326 for supplying power to the PCI expansion cards is disclosed. The protection circuit includes a current monitor 212 that monitors the current levels drawn by the PCI expansion card at each power rail. An inrush current controller 330/332/334 controls the initial current applied to each of the power rails when an expansion card is initially inserted into an expansion slot. A voltage monitor 212 monitors the voltage levels applied to selected power rails and a disconnector 210 disconnects the power to the PCI expansion slot when either the current level drawn by the PCI expansion card at any of the power rails goes beyond a selected range or when the voltage levels at any of the selected monitored power rails are below a selected threshold, or when commanded to by the computer system.

    Abstract translation: 公开了一种用于具有PCI扩展卡120的计算机系统110的保护电路116和具有用于向PCI扩展卡供电的多个电源轨312,322,314,328,318,324,320,326的PCI扩展槽118。 保护电路包括电流监视器212，其监视由PCI扩展卡在每个电力轨上绘制的电流水平。 浪涌电流控制器330/332/334控制当扩展卡最初插入到扩展槽中时施加到每个电源轨的初始电流。 电压监视器212监视施加到所选择的电源轨的电压电平，并且当PCI扩展卡在任何电源轨下拉出的电流水平超过所选择的范围时，断路器210断开与PCI扩展槽的电力，或者当 所选择的所监视的电力轨道中的任何一个电压电平都低于选定的阈值，或者由计算机系统命令。

    Fault isolation
    6.
    发明公开
    Fault isolation 失效
    Fehlereingrenzung

    公开(公告)号：EP0820012A2

    公开(公告)日：1998-01-21

    申请号：EP97303790.6

    申请日：1997-06-04

    Applicant: Compaq Computer Corporation

    Inventor： Goodrum, Alan L. ,  Autor, Jeffrey S. ,  Culley, Paul R. ,  Miller, Joseph P. ,  Tavallaei, Siamak ,  Basile, Barry S. ,  Richard, Elizabeth A. ,  Rose, Eric E.

    IPC: G06F11/273

    CPC classification number: G06F11/2005 ,  G06F11/0757 ,  G06F11/10 ,  G06F11/2007 ,  G06F11/2012 ,  G06F11/221 ,  G06F11/2221 ,  G06F11/349

    Abstract: A device causing a faulty condition in a computer system having devices is isolated by detecting for a faulty condition associated with the devices and identifying the device causing the faulty condition. The devices are coupled to a bus. The faulty condition includes a bus hang condition. The devices are turned off when a bus hang condition is detected. The devices are then turned back on to test the devices. Each device is tested by writing and reading its configuration space. Information on the bus associated with the faulty condition is stored. The stored information is retrieved after the faulty condition has occurred, with the stored information including address, data, and bus control information.

    Abstract translation: 在具有设备的计算机系统中导致故障状态的设备通过检测与设备相关联的故障状况并识别引起故障状态的设备而被隔离。 这些设备耦合到总线。 故障状况包括总线挂起状况。 当检测到总线挂起状态时，设备被关闭。 然后将设备重新打开以测试设备。 每个设备都通过写入和读取其配置空间进行测试。 存储与故障条件相关的总线上的信息。 所存储的信息在故障状态发生之后被检索，存储的信息包括地址，数据和总线控制信息。

    Using subordinate bus devices in a computer system
    7.
    发明公开
    Using subordinate bus devices in a computer system 失效
    在einem Rechnersystem的Verwendung von untergeordnetenBusgeräten

    公开(公告)号：EP0811938A2

    公开(公告)日：1997-12-10

    申请号：EP97303807.8

    申请日：1997-06-04

    Applicant: Compaq Computer Corporation

    Inventor： Whiteman, William F. ,  Goodrum, Alan L. ,  Cox, Tod B. ,  Basile, Barry S.

    IPC: G06F13/42 ,  G06F13/40

    CPC classification number: G06F13/404

    Abstract: A computer system has a central processing unit and a bus. A first bus device and a second bus device are connected to the bus. A circuit is connected to configure the second bus device to be addressable by the central processing unit via the bus only by interaction with the first bus device. The first bus device may be an I 2 O processor, and the second bus device may be an I 2 O subordinate bus device.

    Abstract translation: 计算机系统具有中央处理单元和总线。 第一总线设备和第二总线设备连接到总线。 电路被连接以通过总线仅通过与第一总线设备的交互来将第二总线设备配置为可由中央处理单元寻址。 第一总线设备可以是I2O处理器，并且第二总线设备可以是I2O从属总线设备。

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