Electronic assembly having multiple side cooling and method
    2.
    发明公开
    Electronic assembly having multiple side cooling and method 有权
    与在多个页面上的冷却系统,以及方法的电子设备

    公开(公告)号:EP1781076A2

    公开(公告)日:2007-05-02

    申请号:EP06076881.9

    申请日:2006-10-13

    CPC classification number: H05K7/20872 H05K1/182 H05K7/20927

    Abstract: An electronics assembly (10) is provided having a substrate (12) and at least one electronics package (20) supported on the substrate (12). The electronics package (20) also has electrical circuitry and first and second side surfaces. The assembly (10) further includes a first heat sink device (30) positioned in thermal communication with the first side surface of the electronics package (20), and a second heat sink device (40) positioned in thermal communication with the second side surface of the electronics package (20).

    Abstract translation: 电子组件(10)的基材,提供具有支撑在(12)一个基片(12)和至少一个电子器件封装(20)。 电子封装件(20),因此具有电路和第一和第二侧表面。 该组件(10)还包括在热连通并位于与电子器件封装(20)的第一侧面上的第一散热器装置(30),和在热连通并位于与所述第二侧表面的第二散热装置(40) 的电子封装件(20)。

    Shapeable short-resistant capacitor
    3.
    发明公开
    Shapeable short-resistant capacitor 有权
    Formbarer Kondensator mit Kurzschlussfestigkeit

    公开(公告)号:EP2273517A1

    公开(公告)日:2011-01-12

    申请号:EP10167297.0

    申请日:2010-06-25

    Abstract: A method that employs a novel combination of conventional fabrication techniques provides a ceramic short-resistant capacitor (30) that is bendable and/or shapeable to provide a multiple layer capacitor that is extremely compact and amenable to desirable geometries. The method allows thinner and more flexible ceramic capacitors to be made. The method includes forming a first thin metal layer (12) on a substrate (10); depositing a thin, ceramic dielectric layer (14) over the metal layer (12); depositing a second thin metal layer (18) over the dielectric layer to form a capacitor exhibiting a benign failure mode; and separating the capacitor (30) from the substrate (10).

    Abstract translation: 使用常规制造技术的新颖组合的方法提供了可弯曲和/或可成形的陶瓷短路电容器(30),以提供非常紧凑并且适合于所需几何形状的多层电容器。 该方法可以制造更薄更柔性的陶瓷电容器。 该方法包括在基底(10)上形成第一薄金属层(12)。 在所述金属层(12)上沉积薄的陶瓷介电层(14); 在所述电介质层上沉积第二薄金属层(18)以形成呈现良性失效模式的电容器; 以及将所述电容器(30)与所述基板(10)分离。

    Contact for ceramic capacitor with self-clearing feature
    4.
    发明公开
    Contact for ceramic capacitor with self-clearing feature 有权
    KontaktierungfürKeramikkondensatoren mitselbstlöschenderFunktion

    公开(公告)号:EP2254132A1

    公开(公告)日:2010-11-24

    申请号:EP10161616.7

    申请日:2010-04-30

    CPC classification number: H01G4/015 H01G4/1218

    Abstract: A capacitor (10) exhibiting a benign failure mode has a first electrode layer (12), a first ceramic dielectric layer (14) deposited on a surface of the first electrode (12), and a second electrode layer (16) disposed on the ceramic dielectric layer (14), wherein selected areas of the ceramic dielectric layer (14) have additional dielectric material (18) of sufficient thickness to exhibit a higher dielectric breakdown voltage than the remaining majority of the dielectric layer (14). The added thickness of the dielectric layer (14) in selected areas allows lead connections (22) to be made at the selected areas of greater dielectric thickness while substantially eliminating a risk of dielectric breakdown and failure at the lead connections (22), whereby the benign failure mode is preserved.

    Abstract translation: 表现出良性破坏模式的电容器(10)具有第一电极层(12),沉积在第一电极(12)的表面上的第一陶瓷电介质层(14)和设置在第一电极层 陶瓷介电层(14),其中所述陶瓷介电层(14)的选定区域具有足够厚度的附加电介质材料(18),以显示比所述电介质层(14)的剩余大部分更高的介电击穿电压。 在选择的区域中增加的介电层(14)的厚度允许在更大介电厚度的选定区域处制造引线连接(22),同时基本消除引线连接件(22)处的介电击穿和故障的风险,由此 良性失败模式得以保留。

    Contact for ceramic capacitor with self-clearing feature
    5.
    发明授权
    Contact for ceramic capacitor with self-clearing feature 有权
    具有自清除功能的陶瓷电容器的触点

    公开(公告)号:EP2254132B1

    公开(公告)日:2018-03-28

    申请号:EP10161616.7

    申请日:2010-04-30

    CPC classification number: H01G4/015 H01G4/1218

    Abstract: A capacitor (10) exhibiting a benign failure mode has a first electrode layer (12), a first ceramic dielectric layer (14) deposited on a surface of the first electrode (12), and a second electrode layer (16) disposed on the ceramic dielectric layer (14), wherein selected areas of the ceramic dielectric layer (14) have additional dielectric material (18) of sufficient thickness to exhibit a higher dielectric breakdown voltage than the remaining majority of the dielectric layer (14). The added thickness of the dielectric layer (14) in selected areas allows lead connections (22) to be made at the selected areas of greater dielectric thickness while substantially eliminating a risk of dielectric breakdown and failure at the lead connections (22), whereby the benign failure mode is preserved.

    Capacitor fabrication using nano materials
    6.
    发明公开
    Capacitor fabrication using nano materials 审中-公开
    Herstellung eines Kondensators unter Verwendung von Nanomaterialien

    公开(公告)号:EP2846338A1

    公开(公告)日:2015-03-11

    申请号:EP14181285.9

    申请日:2014-08-18

    Inventor: Taylor, Ralph S.

    Abstract: A multi-layer capacitor (10) includes an anode (12), a cathode (16), a dielectric material (20), a first endcap (22A), and a second endcap (22B). The anode (12) and cathode (16) are formed of one or more layers (14A, 14B) of interlaced conductive material. The dielectric material (20) is interposed between each of the layers (14A, 14B) of the anode (12) and the cathode (16). The first and second endcaps configured to interconnect each of the layers (14A, 14B) of the anode (12) and cathode (16), respectively. The endcaps are formed of conductive nano material. A method of forming an endcap of a capacitor (10) configured to interconnect one or more layers (14A, 14B) of conductive material includes the step of applying conductive nano material (34) to exposed conductive surfaces of at least one of an anode (12) and a cathode (16) of the one or more layers (14A, 14B) of conductive material. The method also includes the step of exposing the nano material to a source of energy effective to initiate self-sintering of the nano material.

    Abstract translation: 多层电容器(10)包括阳极(12),阴极(16),电介质材料(20),第一端盖(22A)和第二端盖(22B)。 阳极(12)和阴极(16)由交织导电材料的一个或多个层(14A,14B)形成。 介电材料(20)插入在阳极(12)和阴极(16)的每个层(14A,14B)之间。 第一和第二端盖被配置成分别互连阳极(12)和阴极(16)的每个层(14A,14B)。 端盖由导电纳米材料形成。 一种形成电容器(10)的端帽的方法,该电容器被构造成将导电材料的一个或多个层(14A,14B)互连,包括将导电纳米材料(34)施加到阳极(至少一个)的暴露的导电表面的步骤 12)和导电材料的一个或多个层(14A,14B)的阴极(16)。 该方法还包括将纳米材料暴露于有效地引发纳米材料的自烧结的能量源的步骤。

    Lead Lanthanum Zirconium Titanate (PLZT) capacitor on inorganic flexible glass substrate
    10.
    发明公开
    Lead Lanthanum Zirconium Titanate (PLZT) capacitor on inorganic flexible glass substrate 审中-公开
    Blei Lanthan Zirkonium Titan(PLZT)Kondensator auf einem anorganische Flexibleglassubstrat

    公开(公告)号:EP2869321A2

    公开(公告)日:2015-05-06

    申请号:EP14187617.7

    申请日:2014-10-03

    Abstract: A lead-lanthanum-zirconium-titanate (PLZT) capacitor (10) on a substrate (12) formed of an inorganic film glass. The first metallization layer (14) is deposited on a top side of the substrate (12) to form a first electrode (18). The dielectric layer (20) of PLZT is deposited over the first metallization layer (14). The second metallization layer (22) deposited over the dielectric layer (20) to form a second electrode (24). The glass substrate (12) is advantageous as glass is compatible with an annealing process at 650°C used to form the capacitor (10). Further, the inorganic glass film capacitor (10) can be roll to form a wound capacitor with increased electrical properties.

    Abstract translation: 在由无机膜玻璃形成的基板(12)上的铅 - 镧 - 锆酸锆(PLZT)电容器(10)。 第一金属化层(14)沉积在衬底(12)的顶侧上以形成第一电极(18)。 PLZT的电介质层(20)沉积在第一金属化层(14)上。 第二金属化层(22)沉积在电介质层(20)上以形成第二电极(24)。 玻璃基板(12)是有利的,因为玻璃与用于形成电容器(10)的650℃的退火工艺相容。 此外,无机玻璃膜电容器(10)可以滚动以形成具有增加的电性能的卷绕电容器。

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