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    Technique for manufacturing silicon structures
    2.
    发明公开
    Technique for manufacturing silicon structures 审中-公开
    Herstellungsverfahren von Siliziumstrukturen

    公开(公告)号：EP1717196A1

    公开(公告)日：2006-11-02

    申请号：EP06075842.2

    申请日：2006-04-07

    Applicant: Delphi Technologies, Inc.

    Inventor： Baney, William J. ,  Chilcott, Dan W.

    IPC: B81C1/00 ,  G01L9/00 ,  H01L29/02

    CPC classification number: B81C1/00158 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/014 ,  B81C2201/019 ,  G01L9/0042

    Abstract: A technique for manufacturing silicon structures includes etching a cavity into a first side of an epitaxial wafer (506). A thickness of an epitaxial layer is selected, based on a desired depth of the etched cavity and a desired membrane thickness. The first side of the epitaxial wafer is then bonded to a first side of a handle wafer (510). After thinning the epitaxial wafer until only the epitaxial layer remains, desired circuitry is formed on a second side of the remaining epitaxial layer (516), which is opposite the first side of the epitaxial wafer.

    Abstract translation: 制造硅结构的技术包括将空腔蚀刻到外延晶片（506）的第一侧。 基于蚀刻腔的期望深度和期望的膜厚选择外延层的厚度。 然后将外延晶片的第一侧接合到处理晶片（510）的第一侧。 在使外延晶片变薄直到仅剩余外延层之后，在与外延晶片的第一侧相对的剩余外延层（516）的第二侧上形成所需的电路。

    Shapeable short-resistant capacitor
    3.
    发明公开
    Shapeable short-resistant capacitor 有权
    Formbarer Kondensator mit Kurzschlussfestigkeit

    公开(公告)号：EP2273517A1

    公开(公告)日：2011-01-12

    申请号：EP10167297.0

    申请日：2010-06-25

    Applicant: Delphi Technologies, Inc.

    Inventor： Taylor, Ralph S. ,  Myers, John D. ,  Baney, William J.

    IPC: H01G4/015 ,  H01G13/00

    CPC classification number: H01G2/18 ,  H01G4/015 ,  H01G4/1218 ,  H01G4/308 ,  H01G13/00 ,  Y02T10/7022 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T156/1168

    Abstract: A method that employs a novel combination of conventional fabrication techniques provides a ceramic short-resistant capacitor (30) that is bendable and/or shapeable to provide a multiple layer capacitor that is extremely compact and amenable to desirable geometries. The method allows thinner and more flexible ceramic capacitors to be made. The method includes forming a first thin metal layer (12) on a substrate (10); depositing a thin, ceramic dielectric layer (14) over the metal layer (12); depositing a second thin metal layer (18) over the dielectric layer to form a capacitor exhibiting a benign failure mode; and separating the capacitor (30) from the substrate (10).

    Abstract translation: 使用常规制造技术的新颖组合的方法提供了可弯曲和/或可成形的陶瓷短路电容器（30），以提供非常紧凑并且适合于所需几何形状的多层电容器。 该方法可以制造更薄更柔性的陶瓷电容器。 该方法包括在基底（10）上形成第一薄金属层（12）。 在所述金属层（12）上沉积薄的陶瓷介电层（14）; 在所述电介质层上沉积第二薄金属层（18）以形成呈现良性失效模式的电容器; 以及将所述电容器（30）与所述基板（10）分离。

    Thermally isolated membrane structure
    4.
    发明公开
    Thermally isolated membrane structure 有权
    Thermisch isolierte Membranstruktur

    公开(公告)号：EP1787946A2

    公开(公告)日：2007-05-23

    申请号：EP06076992.4

    申请日：2006-11-08

    Applicant: Delphi Technologies, Inc.

    Inventor： Baney, William J.

    IPC: B81B7/00

    CPC classification number: B81B3/0081 ,  B81B2203/0127

    Abstract: An MEMS device (30) including a semiconductor substrate (42) having an upper and lower surface, and a support structure (32) disposed at least partially in the semiconductor substrate. The support structure (32) includes a plurality of support members (36) oriented to define a plurality of cells (38a, 38b) in the semiconductor substrate (42). A thermally isolated membrane (50) is disposed above the upper surface of the semiconductor substrate (42) and is supported by the support structure (32). At least one functional component (54) is mounted to the membrane. The plurality of cells (38a, 38b) are located substantially beneath the at least one functional component (54).

    Abstract translation: 包括具有上表面和下表面的半导体衬底（42）和至少部分地设置在半导体衬底中的支撑结构（32）的MEMS器件（30）。 支撑结构（32）包括定向成在半导体衬底（42）中限定多个单元（38a，38b）的多个支撑构件（36）。 热隔离膜（50）设置在半导体衬底（42）的上表面上方并由支撑结构（32）支撑。 至少一个功能部件（54）安装到膜上。 多个单元（38a，38b）基本上位于至少一个功能部件（54）的下方。

    Thermally isolated membrane structure
    6.
    发明公开
    Thermally isolated membrane structure 有权
    隔热膜结构

    公开(公告)号：EP1787946A3

    公开(公告)日：2008-06-04

    申请号：EP06076992.4

    申请日：2006-11-08

    Applicant: Delphi Technologies, Inc.

    Inventor： Baney, William J.

    IPC: B81B7/00

    CPC classification number: B81B3/0081 ,  B81B2203/0127

    Abstract: An MEMS device (30) including a semiconductor substrate (42) having an upper and lower surface, and a support structure (32) disposed at least partially in the semiconductor substrate. The support structure (32) includes a plurality of support members (36) oriented to define a plurality of cells (38a, 38b) in the semiconductor substrate (42). A thermally isolated membrane (50) is disposed above the upper surface of the semiconductor substrate (42) and is supported by the support structure (32). At least one functional component (54) is mounted to the membrane. The plurality of cells (38a, 38b) are located substantially beneath the at least one functional component (54).

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