中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

11 records (took 0.019 seconds)

    DEVICE AND METHOD FOR INJECTION MOLDING OF MOLTEN SOLDER
    2.
    发明专利
    DEVICE AND METHOD FOR INJECTION MOLDING OF MOLTEN SOLDER 失效

    公开(公告)号：JPH0655260A

    公开(公告)日：1994-03-01

    申请号：JP8164393

    申请日：1993-04-08

    Applicant: IBM

    Inventor： TOOMASU JIYOOJI FUERENSU ,  PIITAA ARUFURETSUDO GURABAA ,  BAANAADO HERUNANDESU ,  MAIKERU JIYON PAAMAA ,  AASAA RICHIYAADO JINGAA

    IPC: B23K3/00 ,  B23K1/20 ,  B23K3/06 ,  B29C45/00 ,  H05K3/34

    Abstract: PURPOSE: To provide a device and a method enabling formation of a solder mount of uniform height by injection molding solder on an electronic device. CONSTITUTION: A device 2 has a reservoir pipe for molten solder arranged on a cavity of an injection plate 34. The injection plate is arranged on a forming mold 32, having an array of cavities. The forming mold is arranged on a working member. The working member is heated, and molten solder is pushed by gas pressure into a recessed part of the injection plate arranged on the array of cavities of mold and then into the array of cavities of forming mold. The injection plate slides on the forming mold and wipes away excess solder on the forming mold with a plurality of wiping apertures. The injection plate further moves to the position of a non-solder affinitive surface and is removed there.

    MULTI-CHIP PACKAGING CONSTRUCTION AND TEST THEREOF
    3.
    发明专利
    MULTI-CHIP PACKAGING CONSTRUCTION AND TEST THEREOF 失效

    公开(公告)号：JPS6410184A

    公开(公告)日：1989-01-13

    申请号：JP11943688

    申请日：1988-05-18

    Applicant: IBM

    Inventor： SUKOTSUTO ROURENSU JIYAKOBUSU ,  MARISU TOOMASU MAKUMAAHAN JIYU ,  PAAWAATSU NIIHAARU ,  BAAHAN OZUMATSUTO ,  HENRIII DANIERU SHIENAAMAN ,  AASAA RICHIYAADO JINGAA

    IPC: G01R31/28 ,  G01R31/3185 ,  G06F11/27

    Abstract: PURPOSE: To easily test each chip of a multichip packaging structure by combining the separation of chips to be tested and self-tests with each other. CONSTITUTION: A chip (UUT) to be tested is discriminated from a module. The interference between all other chips from which the UUT is separated and tests is electrically inhibited. The count of all patterns applied upon the UUT is fetched from a memory. A set of pseudo-random or weighted pseudo- random patterns is propagated through the logic circuit of the UUT and becomes a predicted binary value which is found from the output of the UUT. The binary value is outputted from the UUT and accumulated in a signature analyzer and the accumulated result is sent to a comparator. A signature simulated for the UUT is inputted to the comparator from the memory and compared with an actual signature. Therefore, all chips of the module are tested and, when the diagnosis is completed, the process is stopped.

    INTEGRATED CIRCUIT CHIP-PACKAGE STRUCTURE
    5.
    发明专利
    INTEGRATED CIRCUIT CHIP-PACKAGE STRUCTURE 失效

    公开(公告)号：JPH05198730A

    公开(公告)日：1993-08-06

    申请号：JP27005192

    申请日：1992-10-08

    Applicant: IBM

    Inventor： SUKOTSUTO ROORENSU YAKOBUSU ,  PERUWAITSU NIHARU ,  BURUHAN OZUMATSUTO ,  HENRII DAINIRU SHIYUNAAMAN ,  AASAA RICHIYAADO JINGAA

    IPC: H01L23/12 ,  H01L23/50 ,  H01L23/538

    Abstract: PURPOSE: To reduce capacitance of signal line, related to a multi-layer integrated circuit chip package structure comprising a reference conductive layer and a patterned conductive layer comprising, while adjoining the reference conductive layer, a narrow signal line and a wide signal line is assigned. CONSTITUTION: An integrated circuit chip package comprises a reference conductive layer 8, which supplies a voltage for electric power or earth and a patterned conductive layer which, assigned adjoining it, comprises a narrow signal line 20 and a wide signal line 19. The reference conductive layer 8 of a region 7 facing the wide signal line 19 is removed, so that no layer is present in the region. Thus, the capacitance of the signal line is reduced for optimum operation.

    8.
    发明专利
    失效

    公开(公告)号：JPH05342841A

    公开(公告)日：1993-12-24

    申请号：JP9388191

    申请日：1991-04-24

    Applicant: IBM

    Inventor： CHIYAARUZU AREN BURAUN ,  TOOMASU AREN GUREGORII ,  KURISUTOFUAA GIRUDO KERAA ,  HAAMAN RATSUSERU UENTO ,  AASAA RICHIYAADO JINGAA

    IPC: G11B5/71 ,  G11B25/04 ,  G11B33/14

    Abstract: PURPOSE: To largely suppress the number of impurity molecules adsorbed to the surface of a treated device with preferable species of molecules. CONSTITUTION: In one example of use of this invention, a rigid disk type magnetic data storage device is presented. The device requires a monomolecular layer of a lubricant on the surface of a disk and a slider. A vapor drain 6 traps impurity molecules from the atmosphere to suppress the number of contaminants. A desired lubricant is used as a material having very low vapor pressure which can remain on the disk surface 4 for a long time, and the lubricant enters into the vapor drain 6 at a small velocity. Or else, a lubricant having rather high vapor pressure is supplied from a reservoir 3 through a vapor phase. The molecules enter the vapor drain 6 at a high speed so the reservoir 3 is required to supply molecules into air for rather high speed than the supply rate from the contamination source. In any case, the vapor drain 6 decreases contamination on the surface in a packaged body.

    LIQUID METAL MATRIX THERMAL PASTE AND ITS MANUFACTURE
    9.
    发明专利
    LIQUID METAL MATRIX THERMAL PASTE AND ITS MANUFACTURE 失效

    公开(公告)号：JPH0371992A

    公开(公告)日：1991-03-27

    申请号：JP20259990

    申请日：1990-08-01

    Applicant: IBM

    Inventor： RICHIYAADO BENTON BUUSU ,  GARII UIRIAMU GURATSUBE ,  PIIITAA ARUFURETSUDO GURABAA ,  IGUNOO WAI HANDOROSU ,  AASAA RICHIYAADO JINGAA

    IPC: H05K7/20 ,  B22F1/02 ,  B23K35/20 ,  B23K35/22 ,  B23K35/26 ,  C22C1/02 ,  H01L23/36 ,  H01L23/373

    Abstract: PURPOSE: To obtain a liquid metal matrix thermal paste having high thermal conductivity while permanently maintaining a semi-liquid state by dispersing particulates of a specific metal or thermally conductive nonmetal into a low melting liquid metal matrix consisting of a specific liquid metal. CONSTITUTION: The liquid metal matrix thermal paste consists of the thermally conductive particulates 12 dispersed into the low melting point liquid metal matrix 14. The liquid metal consists of an eutectic alloy of, for example, gallium and indium, an eutectic alloy of gallium and tin, a ternary eutectic alloy of gallium, indium and tin and an element having a m.p. of about 7 deg.C. The particles 12 are the metal or thermally conductive nonmetal. The particles 12 are so selected as to be nonreactive with the liquid metal, such as gallium, at the low temp. in order to obtain the paste for permanently maintaining the semi-liquid state. The particles 12 to be used are, for example, tungsten, molybdenum, silicon or the other particles having a low interaction rate with the gallium at the temp. lower than, for example, about 100 deg.C. As a result, the paste having the high thermal conductivity is obtd.

Patent Agency Ranking