公开(公告)号：JPS63115071A

公开(公告)日：1988-05-19

申请号：JP23275587

申请日：1987-09-18

Applicant: IBM

Inventor： BEHA JOHANNES G ,  BLACHA ARMIN U ,  CLAUBERG ROLF ,  SEITZ HUGO K

IPC: H01L21/66 ,  G01N23/22 ,  G01R31/02 ,  G01R31/308 ,  H05K3/00

公开(公告)号：CA1232975A

公开(公告)日：1988-02-16

申请号：CA499557

申请日：1986-01-14

Applicant: IBM

Inventor： BEHA JOHANNES G ,  DREYFUS RUSSELL W ,  RUBLOFF GARY W

IPC: G01R31/26 ,  G01Q30/02 ,  G01Q30/16 ,  G01Q30/20 ,  G01R31/308 ,  H01L21/66 ,  G01R15/12

Abstract: NONCONTACT FULL-LINE DYNAMIC AC TESTER FOR INTEGRATED CIRCUITS Simultaneous noncontact testing of voltages across a full line of test sites on an integrated circuit chip-to-test is achieved with high time resolution using photoelectron emission induced by a pulsed laser focussed to a line on the chip-to-test, together with high speed electrostatic deflection perpendicular to the line focus. Photoelectrons produced by the line focus of pulsed laser light are imaged to a line on an array detector, the measured photoelectron intensities at array points along this line representing voltages at corresponding points along the line illuminated by the laser focus. High speed electrostatic deflection applied during the laser pulse, perpendicular to the direction of the line focus, disperses the line image (column) on the array detector across a sequence of sites at right angles (rows), thereby revealing the time-dependence of voltages in the column of test sites with high time resolution (in the picosecond range). Y0984028

公开(公告)号：CA1236929A

公开(公告)日：1988-05-17

申请号：CA499662

申请日：1986-01-15

Applicant: IBM

Inventor： BEHA JOHANNES G ,  DREYFUS RUSSELL W ,  HARTSTEIN ALLAN M ,  RUBLOFF GARY W

IPC: G01R31/28 ,  G01R31/308 ,  H01L21/66 ,  G01R31/26

Abstract: PHOTON ASSISTED TUNNELING TESTING OF PASSIVATED INTEGRATED CIRCUITS Covering metal test pads of a passivated integrated circuit process intermediate wafer or completed integrated circuit chip-to-test, with a thin conductive overlayer, and then accessing the test pads through the passivation layer and conductive overlayer, by a pulsed laser to provide voltage-modulated photon-assisted tunneling through the insulation layer, to the conductive overlayer as an electron current, and detecting the resulting electron current, provides a nondestructive test of integrated circuits. The passivation, normally present to protect the integrated circuit, also lowers the threshold for photoelectron emission. The conductive overlayer acts as a photoelectron collector for the detector. A chip-to-test which is properly designed for photon assisted tunneling testing has test sites accessible to laser photons even though passivated. Such a chip-to-test may be nondestructively tested in air at one or several stages of its processing, without the sacrifices of mechanical probing or of bringing test sites out to output pads. The conductive overlayer may be removed after tests have been completed. Integrated circuit process intermediate chips may be specially designed for testability, with test sites grouped for easy access through windows left uncovered by subsequent layers.

公开(公告)号：CA1220559A

公开(公告)日：1987-04-14

申请号：CA482173

申请日：1985-05-23

Applicant: IBM

Inventor： BEHA JOHANNES G ,  DREYFUS RUSSELL W ,  RUBLOFF GARY W

IPC: G01R31/302 ,  G01R31/308 ,  H01L21/66 ,  G01R31/28

Abstract: NONCONTACT DYNAMIC TESTER FOR INTEGRATED CIRCUITS Testing of integrated circuit process intermediates, such as warers, dice or chips in various stages of production (test chips) is facilitated by a nonintrusive, noncontact dynamic testing technique, using a pulsed laser, with laser light modification to increase photon energy through conversion to shorter wavelength. The high energy laser light excites electron emissions to pass to the detection system as a composite function of applied light energy and of dynamic operation of the circuit; detecting those emissions by an adjacent detector requires no ohmic contacts or special circuitry on the integrated circuit chip or wafer. Photoelectron energy emitted from a test pad on the test chip is detected as a composite function of the instantaneous input voltage as processed on the test chip, in dynamic operation including improper operation due to fault. The pulse from the laser, as modified through light modification, the parameters of detection of bias voltages, and the distances involved in chipgrid-detector juxtaposition, provides emissions for detection of circuit voltages occurring on the test chip under dynamic conditions simulating actual or stressed operation, with high time resolution of the voltages and their changes on the circuit. Y0984-020