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公开(公告)号:JPS62232127A
公开(公告)日:1987-10-12
申请号:JP3596487
申请日:1987-02-20
Applicant: IBM
Inventor: BUCHMANN PETER LEO , VETTIGER PETER , ZEGHBROECK BART JOZEF VAN
IPC: H01L21/30 , G03F7/40 , H01L21/027 , H01L21/302 , H01L21/3065
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公开(公告)号:JPS6320837A
公开(公告)日:1988-01-28
申请号:JP13200587
申请日:1987-05-29
Applicant: IBM
Inventor: GRAF VOLKER , MOHR THEODOR OSKAR , BUCHMANN PETER LEO , VETTIGER PETER , HOH PETER DAVID
IPC: H01L21/033 , H01L21/285 , H01L21/311 , H01L21/318 , H01L21/336 , H01L21/338 , H01L29/812
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公开(公告)号:CA2017303C
公开(公告)日:1995-12-12
申请号:CA2017303
申请日:1990-05-22
Applicant: IBM
Inventor: BUCHMANN PETER LEO , VETTIGER PETER , VOEGELI OTTO , WEBB DAVID JOHN
IPC: H01L21/302 , G02B6/122 , H01L21/3065 , H01L27/15 , H01S5/00 , H01S5/02 , H01S5/028 , H01S5/16 , H01S5/22 , G02B6/12 , G02B5/08
Abstract: A method, and devices produced therewith, for improving the flatness of etched mirror facets of integrated optic structures with non-planar stripe waveguides such as ridge or groove diode lasers or passive devices like modulators and switches. The curvature in the mirror facet surface, occurring at the edges of the waveguide due to topographical, lithographical and etch process effects, that causes detrimental phase distortions, is avoided by widening the waveguide end near the mirror surface thereby shifting the curved facet regions away from the light mode region to surface regions where curvature is not critical.
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公开(公告)号:DE3682395D1
公开(公告)日:1991-12-12
申请号:DE3682395
申请日:1986-03-27
Applicant: IBM
Inventor: BUCHMANN PETER LEO , VETTIGER PETER , ZEGHBROECK BART JOZEF VAN
IPC: H01L21/30 , G03F7/40 , H01L21/027 , H01L21/302 , H01L21/3065 , G03F7/26
Abstract: Prodn. of sidewalls for use in fabrication of structures with sub-micron lateral dimensions comprises: (a) depositing on a substrate a patterned layer of polymeric resist comprising active H (-OH, -NH, -SH) to form a profile with vertical edges where the sidewalls are to be formed; (b) treating the resist with reactive organometallic silylation agent to substitute active H with Si atoms, i.e. to silylate the top and vertical edges of the profile to a predetermined depth and render the surfaces highly oxygen dry etch resistant, and (c) anisotropic oxygen dry etching to remove silylated resist at the top of the profile and then unsilylated resist, leaving silylated vertical edges of the profile, forming the desired sidewalls, unaffected.
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公开(公告)号:DE3685495D1
公开(公告)日:1992-07-02
申请号:DE3685495
申请日:1986-07-11
Applicant: IBM
Inventor: GRAF VOLKER , MOHR THEODOR OSKAR , BUCHMANN PETER LEO , VETTIGER PETER , HOH PETER DAVID
IPC: H01L21/033 , H01L21/285 , H01L21/311 , H01L21/318 , H01L21/336 , H01L21/338 , H01L29/812 , H01L21/00 , H01L21/28
Abstract: Undercut mask profiles are formed in a semiconductor process by depositing a first plasma CVD nitride layer followed by a second plasma CVD nitride layer at a different excitation frequency, so that the two layer have different etch rates; and patterning and etching the double layer structure to form the desired undercut profile. Method is simple and easy to control and the undercut profile has good temp. stability. The nitride layer are SiNx, SiOxNy or BNx. The gas compsn. for each CVD stage is different, pref. NH3, N2 and SiH4 for the first stage; and N2 and SiH4 for the second stage. The RF frequency is 1-50 MH2 for the first stage and below 100 MHz for the second stage.
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公开(公告)号:BR8700836A
公开(公告)日:1987-12-22
申请号:BR8700836
申请日:1987-02-23
Applicant: IBM
Inventor: BUCHMANN PETER LEO , VETTIGER PETER , ZEGHBROECK BART JOZEF VAN
IPC: H01L21/30 , G03F7/40 , H01L21/027 , H01L21/302 , H01L21/3065 , H01L21/70
Abstract: A process for forming sidewalls for use in the fabrication of semiconductor structures, where the thin, vertical sidewalls are "image transferred" to define sub-micron lateral dimensions.First, a patterned resist profile (13A, 13B) with substantially vertical edges is formed on a substrate (11, 12) on which the sidewalls are to be created. Then, the profile is soaked in a reactive organometallic silylation agent to silylate the top and the vertical edges of the resist to a predetermined depth, thereby rendering the profile surfaces (15S, 15T) highly oxygen etch resistant. In a subsequent anisotropic RIE process, the top (15T) of the profile and the unsilylated resist are removed, leaving the silylated vertical edges (15S), that provide the desired free-standing sidewalls, essentially unaffected.
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