LOW TEMPERATURE TUNNELING TRANSISTOR

    公开(公告)号:CA1216961A

    公开(公告)日:1987-01-20

    申请号:CA469778

    申请日:1984-12-11

    Applicant: IBM

    Abstract: LOW TEMPERATURE TUNNELING TRANSISTOR The low temperature tunneling transistor comprises a source electrode and a drain electrode, with a semiconductor tunnel channel arranged therebetween. A gate for applying control signals is coupled to the channel. The semiconductor, at low temperatures, behaves like an insulator with a low barrier through which charge carriers can tunnel under the influence of an applied drain voltage. The tunnel current can be controlled by a gate voltage which modifies the barrier height between source and drain thereby changing the tunnel probability.

    6.
    发明专利
    未知

    公开(公告)号:DE3685495D1

    公开(公告)日:1992-07-02

    申请号:DE3685495

    申请日:1986-07-11

    Applicant: IBM

    Abstract: Undercut mask profiles are formed in a semiconductor process by depositing a first plasma CVD nitride layer followed by a second plasma CVD nitride layer at a different excitation frequency, so that the two layer have different etch rates; and patterning and etching the double layer structure to form the desired undercut profile. Method is simple and easy to control and the undercut profile has good temp. stability. The nitride layer are SiNx, SiOxNy or BNx. The gas compsn. for each CVD stage is different, pref. NH3, N2 and SiH4 for the first stage; and N2 and SiH4 for the second stage. The RF frequency is 1-50 MH2 for the first stage and below 100 MHz for the second stage.

    LOW TEMPERATURE TUNNELING TRANSISTOR

    公开(公告)号:DE3373167D1

    公开(公告)日:1987-09-24

    申请号:DE3373167

    申请日:1983-12-28

    Applicant: IBM

    Abstract: The transistor comprises two electrodes, source (12) and drain (13), with a semiconductor tunnel channel (11) arranged therebetween. A gate (14) for applying control signals is coupled to the channel. The semiconductor, at low temperatures, behaves like an insulator with a low barrier (some meV) through which charge carriers can tunnel under the influence of an applied drain voltage. The tunnel current can be controlled by a gate voltage VG which modifies the barrier height between source and drain thereby changing the tunnel probability.

    8.
    发明专利
    未知

    公开(公告)号:BR8902555A

    公开(公告)日:1990-01-23

    申请号:BR8902555

    申请日:1989-06-02

    Applicant: IBM

    Abstract: This is a method for making layered structures of artificial high-Tc superconductor compounds by which on top of a seed crystal (7) having a lattice structure matching the lattice structure of the superconductor compound to be made, oxide layers (4, 5, 6) of all constituent components are epitaxially grown in a predetermined sequence so as to create a sandwich structure not found in natural crystals. The epitaxial deposition of the constituent components is performed in a reaction chamber having evaporation facilities, inlets for metal-organic gases, and inlets for background gases including oxygen.

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