公开(公告)号：CA2068796A1

公开(公告)日：1993-03-01

申请号：CA2068796

申请日：1992-05-15

Applicant: IBM

Inventor： CHOU NORMAN C ,  GUM PETER H ,  HOUGH ROGER E ,  KIM MOON J ,  MAZUROWSKI JAMES C ,  MCCAULEY DONALD W ,  SCALZI CASPER A ,  SCANLON JOHN F ,  WYMAN LESLIE W

IPC: G06F9/46 ,  G06F9/48 ,  G06F13/26 ,  G06F15/16

Abstract: P09-91-035 CPU EXPANSIVE GRADATION OF I/O INTERRUPTION SUBCLASS RECOGNITION A CPU interface recognizing a large very number of I/O interruption queues in a logically partitioned data processing system. Different partitions may contain different guest operating systems. The CPU interface controls how plural CPUs respond to I/O interruptions put on numerous hardware-controlled queues. A host hypervisor program dispatches the guest operating systems. The guests use the I/O interruptions in controlling the dispatching of their programs on the CPUs in a system. The invention allows the number of guest partitions in the system to exceed the number of I/O interruption subclasses (ISCs) architected in the system, and enables the dispatching controls of each guest operating system to be sensitive to different priorities for plural programs operating under a respective guest. The invention provides CPU controls that support alerting the host to enabled I/O interruptions, and provides CPU controlled pass-through for enabling direct guest handling of the guests I/O interruptions.