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公开(公告)号：DE68924720D1
公开(公告)日：1995-12-14
申请号：DE68924720
申请日：1989-02-02
Applicant: IBM
Inventor： CLARK CARL EDWARD , GANEK ALAN GEORGE , MALL MICHAEL GERARD , PAGE DAVID RICHARD
Abstract: A method and apparatus is provided to translate the contents of access registers into information for use in performing addressing functions for multiple virtual address spaces. The access registers represent the full addressing capability of the system but do not directly contain the addressing information. The system has a plurality of general purpose registers (20), a plurality of access registers (22) associated with the general registers, an access list (24,25) having access list entries which is addressed by the contents of the access register, memory storage (30) for holding address space number second table entries (ASTE) (98), where the contents of the access list entry locate the ASTE and where the ASTE contains the addressing information needed to locate a virtual address when combined with the contents of a general register. Access register translation (ART) consists of the process of determining addressing information by using the access list entry and the ASTE. The system has available to it at any one time a selection of one of two domains each represented by an access list. One domain is related to the dispatchable unit task to be performed and the other is related to the address space in which a particular program operates. The ART process selects the domain which the access register is using.
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公开(公告)号：BR8900568A
公开(公告)日：1989-10-10
申请号：BR8900568
申请日：1989-02-09
Applicant: IBM
Inventor： BAUM RICHARD IRWIN , BORDEN TERRY LEE , BUTWELL JUSTIN RALPH , CLARK CARL EDWARD , GANEK ALAN GEORGE , LUM JAMES , MALL MICHAEL GERARD , PAGE DAVID RICHARD , PLAMBECK KENNETH ERNEST , SCALZI CASPER ANTHONY , SCHMALZ RICHARD JOHN
Abstract: A program authorization mechanism for authorizing access to an address space in the main memory of a computer system by a program being run under a multiple address space facility. An access-list entry is associated with each address space, each access-list entry being designated by an access-list-entry token contained in an access register. Each access-list entry includes a private indicator which indicates if the associated address space can be accessed by all programs from this access-list entry or if the associatd address space can only be accessed by an authorized program. For a program to be authorized, an extended authorization index in a control register must match an access-list extended authorization index in the access-list entry, or the extended authorization index value must be authorized in an authority table associated with the address space. An instruction for testing a given extended authorization index for a given access-list-entry is also disclosed.
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公开(公告)号：AU9180182A
公开(公告)日：1983-08-11
申请号：AU9180182
申请日：1982-12-22
Applicant: IBM
Inventor： BURK JOHN LESLIE , BUTWELL JUSTIN RALPH , CLARK CARL EDWARD , RODELL JOHN TED , STUCKI DAVID EMMETT
Abstract: This invention relates to the fetch protection of a critical area in the main storage of a data processing system. The critical area is a part of a main storage block protectable by a single storage protect key having a fetch protection field. To enable different fetch protections within a special storage block, fetch protect override controls are provided which partly override the normal operation of the storage protect key for a page located at a predetermined address. While fetch protection is set on for the page's storage block, the fetch protect override controls disable fetch protection for a portion of the page's addresses, e.g. addresses 0-2047. Override enablement is controlled by a fetch protect override control bit in a control register, e.g. bit 6 of control register 0.
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公开(公告)号：DE68923386D1
公开(公告)日：1995-08-17
申请号：DE68923386
申请日：1989-01-17
Applicant: IBM
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公开(公告)号：BR8900567A
公开(公告)日：1989-10-10
申请号：BR8900567
申请日：1989-02-09
Applicant: IBM
Inventor： CLARK CARL EDWARD , GANEK ALAN GEORGE , MALL MICHAEL GERARD , PAGE DAVID RICHARD
Abstract: A method and apparatus is provided to translate the contents of access registers into information for use in performing addressing functions for multiple virtual address spaces. The access registers represent the full addressing capability of the system but do not directly contain the addressing information. The system has a plurality of general purpose registers (20), a plurality of access registers (22) associated with the general registers, an access list (24,25) having access list entries which is addressed by the contents of the access register, memory storage (30) for holding address space number second table entries (ASTE) (98), where the contents of the access list entry locate the ASTE and where the ASTE contains the addressing information needed to locate a virtual address when combined with the contents of a general register. Access register translation (ART) consists of the process of determining addressing information by using the access list entry and the ASTE. The system has available to it at any one time a selection of one of two domains each represented by an access list. One domain is related to the dispatchable unit task to be performed and the other is related to the address space in which a particular program operates. The ART process selects the domain which the access register is using.
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Patent Agency Ranking
公开(公告)号：AU552747B2
公开(公告)日：1986-06-19
申请号：AU9180182
申请日：1982-12-22
Applicant: IBM
Inventor： BURK JOHN LESLIE , BUTWELL JUSTIN RALPH , CLARK CARL EDWARD , RODELL JOHN TED , STUCKI DAVID EMMETT
Abstract: This invention relates to the fetch protection of a critical area in the main storage of a data processing system. The critical area is a part of a main storage block protectable by a single storage protect key having a fetch protection field. To enable different fetch protections within a special storage block, fetch protect override controls are provided which partly override the normal operation of the storage protect key for a page located at a predetermined address. While fetch protection is set on for the page's storage block, the fetch protect override controls disable fetch protection for a portion of the page's addresses, e.g. addresses 0-2047. Override enablement is controlled by a fetch protect override control bit in a control register, e.g. bit 6 of control register 0.
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公开(公告)号：DE68924720T2
公开(公告)日：1996-06-13
申请号：DE68924720
申请日：1989-02-02
Applicant: IBM
Inventor： CLARK CARL EDWARD , GANEK ALAN GEORGE , MALL MICHAEL GERARD , PAGE DAVID RICHARD
Abstract: A method and apparatus is provided to translate the contents of access registers into information for use in performing addressing functions for multiple virtual address spaces. The access registers represent the full addressing capability of the system but do not directly contain the addressing information. The system has a plurality of general purpose registers (20), a plurality of access registers (22) associated with the general registers, an access list (24,25) having access list entries which is addressed by the contents of the access register, memory storage (30) for holding address space number second table entries (ASTE) (98), where the contents of the access list entry locate the ASTE and where the ASTE contains the addressing information needed to locate a virtual address when combined with the contents of a general register. Access register translation (ART) consists of the process of determining addressing information by using the access list entry and the ASTE. The system has available to it at any one time a selection of one of two domains each represented by an access list. One domain is related to the dispatchable unit task to be performed and the other is related to the address space in which a particular program operates. The ART process selects the domain which the access register is using.
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公开(公告)号：DE68923386T2
公开(公告)日：1996-03-28
申请号：DE68923386
申请日：1989-01-17
Applicant: IBM
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公开(公告)号：HU9303459D0
公开(公告)日：1994-04-28
申请号：HU9303459
申请日：1992-04-29
Applicant: IBM
Inventor： CLARK CARL EDWARD , MALL MICHAEL GERARD , SCALZI CASPER ANTONY , SINHA BHASKAR
Abstract: Provides three access levels of storage key protection, comprising a supervisory level (key 0), an intermediate level of non-public and non-supervisory keys (keys 1-8, 10-15), and an unique public level (key 9). The program routines operating with a supervisory-level access key can access both the public level and the intermediate level of storage blocks. Although a program routine operating with an access key in the intermediary access level cannot access any supervisory level storage block, it can access any block assigned a public level storage key, as well as any storage block assigned the respective intermediate level key. One or more third-level public storage keys (PSKs) may be provided. A program access key using one of the PSK values can only access blocks having the same PSK value, and it cannot access blocks having any other key value.
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公开(公告)号：BR8900604A
公开(公告)日：1989-10-10
申请号：BR8900604
申请日：1989-02-10
Applicant: IBM
Inventor： CLARK CARL EDWARD
Abstract: The invention includes the creation of address spaces that need not map in their address range all of the routines of the operating system basic control program (BCP). The BCP, though, will have easy access to (addressability of) the home address space, i.e. to the virtually mapped and addressable control blocks therein. Addressability can be switched from a previously dispatched address space to the home address space. The dispatcher becomes capable of addressing the home address space when predetermined bits in a program status word are set. Once the home address space becomes addressable, the BCP is now capable of easily accessing control blocks in the home address space without the need to modify CPU status or pointers to any other address spaces. If pointers to any other address space are modified, current address translation in the home address space would not be affected. Providing access to the home address space increases performance and reduces complexity.
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