公开(公告)号：JP2001111064A

公开(公告)日：2001-04-20

申请号：JP2000280234

申请日：2000-09-14

Applicant: IBM

Inventor： DOUGLAS D KUURUBAAGU ,  DAVID L HARAME

IPC: H01L27/04 ,  H01L21/20 ,  H01L21/265 ,  H01L21/822 ,  H01L29/70 ,  H01L29/94

Abstract: PROBLEM TO BE SOLVED: To provide a method for forming a diffusion region with low resistance, acceptable defect density, reliability, and process control in a silicon substrate. SOLUTION: The method includes three stages (a), (b), and (c). In the stage (a), first ion implantation is made in a silicon substrate. The stage (a) is executed under conditions where the region of Si being changed into amorphousness is formed in the silicon substrate. In the stage (b), second ion implantation is made in the silicon substrate including the region of Si being changed into amorphousness. The stage (b) is executed by implanting a dopant ion into the silicon substrate under conditions where a second ion implantation peak exists in the region of Si being changed into amorphousness. In the stage (c), the silicon substrate is annealed under conditions where the region of Si being changed into amorphousness is crystallized again, thus including a stage for forming a diffusion region in the silicon substrate.

公开(公告)号：MY124964A

公开(公告)日：2006-07-31

申请号：MYPI20004901

申请日：2000-10-18

Applicant: IBM

Inventor： DOUGLAS D COOLBAUGH ,  DAVID L HARAME ,  JAMES S DUNN ,  PETER J GEISS ,  PETER B GRAY ,  KATHRYN T SCHONENBERG ,  STEPHEN A ST ONGE ,  SESHADRI SUBBANNA

IPC: H01L21/328 ,  H01L21/762 ,  H01L21/8238 ,  H01L21/763 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06

Abstract: A METHOD FOR FORMING A BICMOS INTEGRATED CIRCUIT IS PROVIDED WHICH COMPRISES THE STEPS OF: (A) FORMING A FIRST PORTION OF A BIPOLAR DEVICE IN FIRST REGIONS OF A SUBSTRATE; (B) FORMING A FIRST PROTECTIVE LAYER OVER SAID FIRST REGIONS TO PROTECT SAID FIRST PORTION OF SAID BIPOLAR DEVICES: (C) FORMING FIELD EFFECT TRANSISTOR DEVICES IN SECOND REGIONS OF SAID SUBSTRATE; (D) FORMING A SECOND PROTECTIVE LAYER OVER SAID SECOND REGIONS OF SAID SUBSTRATE TO PROTECT SAID FIELD EFFECT TRANSISTOR DEVICES; (E) REMOVING SAID FIRST PROTECTIVE LAYER; (F) FORMING A SECOND PORTION OF SAID BIPOLAR DEVICES IN SAID FIRST REGIONS OF SAID SUBSTRATE; AND (G) REMOVING SAID SECOND PROTECTIVE LAYER.(FIG 1)

公开(公告)号：SG99316A1

公开(公告)日：2003-10-27

申请号：SG200004756

申请日：2000-08-22

Applicant: IBM

Inventor： DOUGLAS D COOLBAUGH ,  DAVID L HARAME

IPC: H01L21/20 ,  H01L21/265 ,  H01L21/822 ,  H01L29/70 ,  H01L29/94 ,  H01L27/04 ,  H01L21/324 ,  H01L21/22 ,  H01L29/78

Abstract: A method of forming a diffusion region in a silicon substrate having low-resistance, acceptable defect density, reliability and process control comprising the steps of: (a) subjecting a silicon substrate to a first ion implantation step, said first ion implantation step being conducted under conditions such that a region of amorphized Si is formed in said silicon substrate; (b) subjecting said silicon substrate containing said region of amorphized Si to a second ion implantation step, said second ion implantation step being carried out by implanting a dopant ion into said silicon substrate under conditions such that the peak of implant of said dopant ion is within the region of amorphized Si; and (c) annealing said silicon substrate under conditions such that said region of amorphized Si is re-crystallized thereby forming a diffusion region in said silicon substrate is provided.