公开(公告)号：DE1802849A1

公开(公告)日：1969-04-30

申请号：DE1802849

申请日：1968-10-12

Applicant: IBM

Inventor： GEORGE GROCHOWSKI EDWARD ,  FALLS WAPPINGER ,  PHILIP CASTRUCCI PAUL ,  STEVEN HESS MARTIN ,  MAHERAS GEORGE ,  DAVID NORTH WILLIAM

IPC: H01L21/822 ,  H01L21/331 ,  H01L21/74 ,  H01L21/8222 ,  H01L27/00 ,  H01L27/04 ,  H01L29/04 ,  H01L29/73 ,  H01L7/64

Abstract: 1,241,057. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORP. 2 Oct., 1968 [19 Oct., 1967], No. 46759/68. Heading H1K. A high conductivity N type zone in a device formed in a body of monocrystalline semiconductor material having a face parallel to a 100 crystallographic plane has a surface concentration of phosphorus of 2À5 to 4 x 10 3 parts per million by weight. This is achieved without significant precipitation of phosphorus due to the low dislocation density in thus aligned material. A junction isolated transistor (Fig. 2) in a typical solid circuit embodiment is formed on a 10-20 ohm. cm. P type silicon wafer 30 cut from a crystal grown along a 100 axis with its faces in a 100 plane. Subcollector region 32 is formed by diffusion and extends during epitaxial deposition of N-type epitaxial layer 34. A grid of isolation walls 37 is next diffused in prior to formation of base 38 and emitter 40 by successive diffusions. Alternatively region 32 is formed by ion implantation or etch and refill steps. Aluminium, platinum or palladium contacts 42 are formed by vapour deposition overall followed by pattern etching in a nitric-phosphoric acid mix. The diffusions are all effected through holes formed by conventional photolithographic techniques in thermal oxide layers. Arsenic is the dopant in regions 32, 34, boron in 37, 38 and phosphorus in the collector. The decline in current gain # with falling collector current is far less than in an otherwise identical device formed on a 111 orientated substrate. Manufacture of an oxide or nitride passivated planar epitaxial transistor (Fig. 1, not shown) with a phosphorus doped emitter and of an enhancement mode IGFET with N+ phosphorus doped source and drain regions is also described. The IGFET has a lower threshold voltage than its 111 orientated counterpart.

公开(公告)号：DE2041343A1

公开(公告)日：1971-03-18

申请号：DE2041343

申请日：1970-08-20

Applicant: IBM

Inventor： PHILLIP CASTRUCCI PAUL ,  ROGENE GATES HARLAN ,  ATHANASIUS HENLE ROBERT ,  DAVID PRICER WILBUR ,  MICHAEL MORTON ROBERT ,  WESTLEY MASON JOHN ,  DAVID NORTH WILLIAM

IPC: F22B21/06 ,  G11C17/06 ,  G11C17/14 ,  G11C17/16 ,  H01L23/525 ,  H01L27/00 ,  H01L27/102 ,  G11C17/00

Abstract: A read only memory having the capability of being written into once after manufacture. The cells of the memory are capable of being fused or permanently altered by directing a fusing current to the selected cells. The cell is a monolithic semiconductor device comprising a diode to be biased in a forward direction and a diode to be biased in the reverse direction structured so as to form back-to-back diodes. The reverse diode has a lower reverse breakdown voltage than the forward diode, and a metal connection, unconnected to any remaining circuit elements contacts the semiconductor device between diode junctions. The fusing current causes a metal-semiconductor alloy to form and short out the reverse diode.