中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

11 records (took 0.017 seconds)

    5.
    发明专利
    未知

    公开(公告)号：DE1562254A1

    公开(公告)日：1970-07-30

    申请号：DE1562254

    申请日：1964-12-30

    Applicant: IBM

    Inventor： DAVID PRICER WILBUR

    IPC: H03K3/315 ,  H03K17/58 ,  H03K5/00

    Abstract: 1,035,570. Sensing circuits for magnetic core matrices; tunnel diode pulse circuits. INTERNATIONAL BUSINESS MACHINES CORPORATION. Dec. 7, 1964 [Dec. 31, 1963], No. 49615/64. Headings H3B and H3T. The output from a magnetic thin film memory matrix is passed to a sensing circuit including an amplifier 50, transmission line 52, and tunnel diodes 60, 62. During read-out from the matrix the tunnel diodes are both gated so that they operate in the low positive resistance regions of their characteristics, just below the peak. A positive output pulse reaching 57 causes diode 60 to switch to the high positive resistance region, the voltage rise at 68 providing a data output signal. In addition, resistors 56, 58 bias diode 62 away from its characteristic peak to prevent a subsequent negative pulse causing it to switch. Similarly, a negative output pulse reaching 57 produces an output signal at 70. The transmission line 52 has an effective length (e.g. 6 nanoseconds) less than that of the output pulse (e.g. 8 nanoseconds), so that the trailing edge of the pulse is attenuated. During a subsequent write operation the spurious pulse induced in the sense line does not switch diodes 60, 62 since they are not gated. Furthermore, after the delay time of line 52 the reflected wave substantially attenuates the spurious pulse. The impedance across terminals 51, 53 is matched to the characteristic impedance of the line. In a modified circuit, Fig. 5, auxiliary tunnel diodes 80, 82 quantize the pulses reaching diodes 60, 62. When the diodes are gated, a positive pulse at 79 switches diode 80 and the voltage across diode 60 changes by a predetermined amount to switch diode 60. Reference has been directed by the Comptroller to Specification 986,677.

    8.
    发明专利
    未知

    公开(公告)号：DE2001530A1

    公开(公告)日：1970-07-30

    申请号：DE2001530

    申请日：1970-01-14

    Applicant: IBM

    Inventor： DAVID PRICER WILBUR

    IPC: G11C5/06 ,  G11C5/14 ,  G11C11/411 ,  G11C11/414 ,  G11C11/415 ,  H01L27/02 ,  H01L27/10 ,  G11C11/40

    Abstract: 1,234,709. Bi-stable stores. INTERNATIONAL BUSINESS MACHINES CORP. 15 Dec., 1969 [15 Jan., 1969], No. 60960/69. Heading G4C. A plurality of bi-stable cells 10, 11 is fed from a single power source which is switchable to act as a constant current source supplying a relatively low current when the cells are passively storing, and as a constant voltage source supplying a relatively high current when the state of a cell is to be changed. The constant current effect is achieved with a resistor 18 which is large in comparison with the impedance of the cells, and the constant voltage effect is achieved by shorting out R18 by a transistor 21. A number of separate sets of bi-stables (24, 25, 26, Fig. 2, not shown) each with its own supply, may be arranged on a single or separate chips.

    9.
    发明专利
    未知

    公开(公告)号：DE1499711A1

    公开(公告)日：1970-07-30

    申请号：DE1499711

    申请日：1966-08-02

    Applicant: IBM

    Inventor： HARRY PALMATEER PAUL ,  DAVID PRICER WILBUR

    IPC: G11C17/04

    Abstract: 1,090,939. Capacitor read-only stores. INTERNATIONALE BUSINESS MACHINES CORPORATION. July 20, 1966 [Aug. 10, 1965], No. 32505/66. Heading G4A. In a capacitor read-only store, the various planes are bonded together to form a single laminated structure. As shown (Fig. 2), a capacitor read-only store comprises a drive plane consisting of a plurality of drive lines 26 on a dielectric base 28, an information plane consisting of a dielectric base 34 with selected areas 33 of a conductive material removed and a sense plane consisting of sense lines 38 (arranged orthogonally to the lines 26) on a dielectric base 42. Further information and sense planes are symmetrically provided on the other side of the drive lines 26, the pattern of holes 33 1 in the lower information plane being the mirror image of those in the upper plane. Ground planes 44, 46 are also provided together with a land plane 50 for making selective electrical connections. Between the various planes there are provided partially cured pre-impregnated epoxy-fibre gass laminating boards 54, 56, 58, 60, 62, 64 which, on further heating and application of pressure, bond the layers into a permanent laminated structure. The array shown may be bonded to a similar array 14. The external circuitry (Fig 8) includes a plurality of differential amplifiers 41 each connected to a pair of corresponding sense lines 38, 38 1 . A plurality of such planes may be formed on a single card (Fig. 5, not shown) and input/output areas connected to pluggable connectors may be provided on a base card (Fig. 6, not shown).

Patent Agency Ranking