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    Schottky barrier device and circuit application
    1.
    发明授权
    Schottky barrier device and circuit application 失效
    肖特基势垒器和电路应用

    公开(公告)号：US3924264A

    公开(公告)日：1975-12-02

    申请号：US48838874

    申请日：1974-07-15

    Applicant: IBM

    Inventor： DORLER JACK A ,  FORNERIS JOHN L ,  SWIETEK DONALD J

    IPC: G11C17/06 ,  H01L27/00 ,  H01L29/48 ,  H01L23/48

    CPC classification number: G11C17/06 ,  H01L27/00

    Abstract: A Schottky barrier diode suitable for implementation in monolithic form for multi-functioned circuit applications comprising a semiconductor substrate and Schottky barrier diodes, each comprising a more than one metal fixed system contacting the semiconductor substrate for forming Schottky barrier junctions.

    Abstract translation: 适用于多功能电路应用的单片形式的肖特基势垒二极管，其包括半导体衬底和肖特基势垒二极管，每个包括与用于形成肖特基势垒结的半导体衬底接触的多于一个的金属固定系统。

    Cross-coupled capacitor for AC performance tuning
    2.
    发明授权
    Cross-coupled capacitor for AC performance tuning 失效
    用于交流性能调谐的交叉耦合电容

    公开(公告)号：US3909637A

    公开(公告)日：1975-09-30

    申请号：US52590374

    申请日：1974-11-21

    Applicant: IBM

    Inventor： DORLER JACK A

    IPC: H03K5/04 ,  H01L21/822 ,  H01L27/04 ,  H03K5/00 ,  H03K5/12 ,  H03K6/00 ,  H03K6/04 ,  H03K17/28 ,  H03K19/086 ,  H03K3/26 ,  H01L29/92

    CPC classification number: H03K5/12 ,  H03K6/04 ,  H03K2005/00045 ,  H03K2005/00163 ,  H03K2005/0028

    Abstract: A method and apparatus for increasing the delays in transitions at controlled terminals in a non-linear integrated circuit by increasing the effective capacitance at the controlled terminals. This can be accomplished by capacitively cross-coupling at opposing phase controlled terminals. The capacitive crosscoupling is effected by connecting two P/N junction diodes in series with opposite directions of conductivity such that the capacitances across the junctions of the diodes are effectively connected in series.

    Abstract translation: 一种用于通过增加受控终端的有效电容来增加非线性集成电路中受控终端的转变延迟的方法和装置。 这可以通过在相对相位控制端子处的电容交叉耦合来实现。 电容交叉耦合通过将两个P / N结二极管串联连接到相反的导电方向来实现，使得跨过二极管的结的电容被有效地串联连接。

    POWER CONTROL MEANS FOR ELIMINATING CIRCUIT TO CIRCUIT DELAY DIFFERENCES AND PROVIDING A DESIRED CIRCUIT DELAY
    6.
    发明专利
    POWER CONTROL MEANS FOR ELIMINATING CIRCUIT TO CIRCUIT DELAY DIFFERENCES AND PROVIDING A DESIRED CIRCUIT DELAY 未知

    公开(公告)号：CA1171471A

    公开(公告)日：1984-07-24

    申请号：CA372655

    申请日：1981-03-10

    Applicant: IBM

    Inventor： BERNDLMAIER ERICH ,  DORLER JACK A ,  MOSLEY JOSEPH M ,  WEITZEL STEPHEN D

    IPC: H03K19/00 ,  G05F1/46 ,  G06F1/04 ,  G06F1/10 ,  H03K3/03 ,  H03K5/00 ,  H03K19/0175 ,  H03K19/086 ,  H03L7/089 ,  H03L7/099

    Abstract: POWER CONTROL MEANS FOR ELIMINATING CIRCUIT TO CIRCUIT DELAY DIFFERENCES AND PROVIDING A DESIRED CIRCUIT DELAY An on chip delay regulator circuit which varies the power in logic or array circuits on the chip so as to minimize, or eliminate, chip to chip circuit speed differences caused by power supply variations and/or lot to lot process differences, temperature, etc. is described. The on chip delay regulator compares a reference signal to an on chip generated signal which is sensitive to power supply changes, lot to lot process changes, temperature, etc. The comparison creates an error signal which is used to change the power (current or voltage) supplied to the on chip circuits. By changing the circuit power, the circuit speed (gate delay) is increased or decreased as necessary to maintain a relatively constant circuit speed on each chip. In an example a plurality of integrated circuit chips each contain an on chip delay regulator. The on chip delay regulator on each chip of said plurality of integrated circuit chips receives and responds to the same signal (or clock). Each chip provides a discrete on chip generated signal related to the parameters of the chip. The gate delay (or speed) of the circuitry on each chip is determined by its on chip delay regulator under control of the common reference signal (or clock). FI9-80-020

    CROSS-COUPLED CAPACITOR FOR AC PERFORMANCE TUNING
    8.
    发明专利
    CROSS-COUPLED CAPACITOR FOR AC PERFORMANCE TUNING 未知

    公开(公告)号：CA1007308A

    公开(公告)日：1977-03-22

    申请号：CA184840

    申请日：1973-11-01

    Applicant: IBM

    Inventor： DORLER JACK A

    IPC: H03K5/04 ,  H01L21/822 ,  H01L27/04 ,  H03K5/00 ,  H03K5/12 ,  H03K6/00 ,  H03K6/04 ,  H03K17/28 ,  H03K19/086

    Abstract: A method and apparatus for increasing the delays in transitions at controlled terminals in a non-linear integrated circuit by increasing the effective capacitance at the controlled terminals. This can be accomplished by capacitively cross-coupling at opposing phase controlled terminals. The capacitive cross-coupling is effected by connecting two P/N junction diodes in series with opposite directions of conductivity such that the capacitances across the junctions of the diodes are effectively connected in series.

    SCHOTTKY BARRIER DEVICE AND CIRCUIT APPLICATION
    9.
    发明专利
    SCHOTTKY BARRIER DEVICE AND CIRCUIT APPLICATION 未知

    公开(公告)号：CA985795A

    公开(公告)日：1976-03-16

    申请号：CA159058

    申请日：1972-12-13

    Applicant: IBM

    Inventor： DORLER JACK A ,  FORNERIS JOHN L ,  SWIETEK DONALD J

    IPC: G11C17/00 ,  G11C17/06 ,  G11C17/08 ,  H01L21/00 ,  H01L27/00 ,  H01L27/102

    Abstract: A monolithic Schottky barrier diode read-only memory comprising a semiconductor substrate having more than one separate and distinctly functional integrated circuit means located thereon. A plurality of Schottky barrier diodes comprising a more than one metal system contact the semi-conductor substrate for forming a plurality of Schottky barrier diode junctions. A separate Schottky barrier diode comprising a corresponding more than one metal system is incorporated into the other separate and distinctly functional integrated circuit means for addressing the Schottky barrier diode and sensing information therefrom. Interconnection metallurgy corresponding to the more than one metal system connects the plurality of separate and distinctly functional integrated circuit means and forms a continuous electrical path with the more than one metal system forming the Schottky barrier diodes.

    CURRENT SWITCH CIRCUIT HAVING AN ACTIVE LOAD
    10.
    发明专利
    CURRENT SWITCH CIRCUIT HAVING AN ACTIVE LOAD 未知

    公开(公告)号：CA1089034A

    公开(公告)日：1980-11-04

    申请号：CA280302

    申请日：1977-06-10

    Applicant: IBM

    Inventor： BLUMBERG RICHARD J ,  DORLER JACK A

    IPC: H03K19/086 ,  H03K17/60 ,  H03K17/62 ,  H03K17/66 ,  H03K17/04

    Abstract: CURRENT SWITCH CIRCUIT HAVING AN ACTIVE LOAD An improved current switch circuit which has an active load is disclosed. The active load comprises a current source at the collectors of switch transistors which generates a current which is less than the current generated by the current source at the emitters of the switch transistors. The active load also includes a circuit for supplying the current difference between source currents as a supplementary current to the current source at the emitters when the associated switch transistors are conductive and a circuit for diverting the source current at the collectors when the switch transistors are non-conduc-tive. Depending on the current generated by the current sources, the performance of the circuit can be selected to optimize power dissipation versus switching speed. The circuit uses a minimum of resistors and a minimum amount of semiconductor area and thereby ensures low power dissipation.

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