公开(公告)号：US3924264A

公开(公告)日：1975-12-02

申请号：US48838874

申请日：1974-07-15

Applicant: IBM

Inventor： DORLER JACK A ,  FORNERIS JOHN L ,  SWIETEK DONALD J

IPC: G11C17/06 ,  H01L27/00 ,  H01L29/48 ,  H01L23/48

CPC classification number: G11C17/06 ,  H01L27/00

Abstract: A Schottky barrier diode suitable for implementation in monolithic form for multi-functioned circuit applications comprising a semiconductor substrate and Schottky barrier diodes, each comprising a more than one metal fixed system contacting the semiconductor substrate for forming Schottky barrier junctions.

Abstract translation: 适用于多功能电路应用的单片形式的肖特基势垒二极管，其包括半导体衬底和肖特基势垒二极管，每个包括与用于形成肖特基势垒结的半导体衬底接触的多于一个的金属固定系统。

公开(公告)号：CA1089113A

公开(公告)日：1980-11-04

申请号：CA298328

申请日：1978-03-02

Applicant: IBM

Inventor： FORNERIS JOHN L ,  HICKS WILLIAM W ,  KELLER JOHN H ,  MCKENNA CHARLES M ,  SEIRMARCO JAMES A

IPC: H01J37/20 ,  G01Q60/00 ,  H01J37/02 ,  H01J37/244 ,  H01J37/317 ,  H01L21/265

Abstract: ION IMPLANTATION APPARATUS FOR CONTROLLING THE SURFACE POTENTIAL OF A TARGET SURFACE In an ion beam apparatus a structure for controlling the surface potential of the target comprising an electron source adjacent to the beam for providing electrons to the beam and means between the target and source for inhibiting rectilinear radiations, i.e., electron and other particle and photon radiations between said source and said target. This prevents heating of the target by the electron source and cross-contamination between the source and the target. A further structure is provided for the measurement of the ion beam current while controlling said surface potential of the target which includes: walls adjacent to and electrically insulated from the target and surrounding the beam whereby the walls and target provide a Faraday Cage, means for introducing variable quantities or electrons into the beam within the Faraday Cage, means for measuring the target current, means for combining and measuring the target and wall currents to provide said ion beam current measurement and means for varying the quantities of introduced electrons to control the target current and thereby the target surface potential.

公开(公告)号：AU2365277A

公开(公告)日：1978-09-28

申请号：AU2365277

申请日：1977-03-25

Applicant: IBM

Inventor： BARILE CONRAD A ,  BRILL ROBERT M ,  FORNERIS JOHN L ,  REGH JOSEPH

IPC: H01L21/306 ,  H01L21/033 ,  H01L21/22 ,  H01L21/223 ,  H01L21/265 ,  H01L21/266 ,  H01L21/331 ,  H01L29/73 ,  H01L21/283 ,  H01L21/31 ,  H01L21/32 ,  H01L27/04

公开(公告)号：CA1082373A

公开(公告)日：1980-07-22

申请号：CA273411

申请日：1977-03-08

Applicant: IBM

Inventor： BARILE CONRAD A ,  BRILL ROBERT M ,  FORNERIS JOHN L ,  REGH JOSEPH

IPC: H01L21/306 ,  H01L21/033 ,  H01L21/22 ,  H01L21/223 ,  H01L21/265 ,  H01L21/266 ,  H01L21/331 ,  H01L29/73 ,  H01L21/324

Abstract: A METHOD OF FORMING AN INTEGRATED CIRCUIT REGION THROUGH THE COMBINATION OF ION IMPLANTATION AND DIFFUSION STEPS A region in an integrated circuit substrate is formed by first ion implanting impurities of a selected conductivity-determining type into a semiconductor substrate through at least one aperture in a masking electrically insulative layer, and then diffusing a conductivitydetermining impurity of the same type through the same aperture into said substrate. The method has particular application when the electrically insulative layer is a composite of two layers, e.g., a top layer of silicon nitride and a bottom layer of silicon dioxide and the aperture is thus a pair of registered openings respectively through said silicon nitride and silicon dioxide layers, and the aperture through the silicon dioxide layer has greater lateral dimensions than that in the silicon nitride layer to provide an undercut beneath the silicon nitride ion implantation barrier layer.

公开(公告)号：FR2347778A1

公开(公告)日：1977-11-04

申请号：FR7705178

申请日：1977-02-18

Applicant: IBM

Inventor： BARILE CONRAD A ,  BRILL ROBERT M ,  FORNERIS JOHN L ,  REGH JOSEPH

IPC: H01L21/306 ,  H01L21/033 ,  H01L21/22 ,  H01L21/223 ,  H01L21/265 ,  H01L21/266 ,  H01L21/331 ,  H01L29/73 ,  H01L21/82

公开(公告)号：CA985795A

公开(公告)日：1976-03-16

申请号：CA159058

申请日：1972-12-13

Applicant: IBM

Inventor： DORLER JACK A ,  FORNERIS JOHN L ,  SWIETEK DONALD J

IPC: G11C17/00 ,  G11C17/06 ,  G11C17/08 ,  H01L21/00 ,  H01L27/00 ,  H01L27/102

Abstract: A monolithic Schottky barrier diode read-only memory comprising a semiconductor substrate having more than one separate and distinctly functional integrated circuit means located thereon. A plurality of Schottky barrier diodes comprising a more than one metal system contact the semi-conductor substrate for forming a plurality of Schottky barrier diode junctions. A separate Schottky barrier diode comprising a corresponding more than one metal system is incorporated into the other separate and distinctly functional integrated circuit means for addressing the Schottky barrier diode and sensing information therefrom. Interconnection metallurgy corresponding to the more than one metal system connects the plurality of separate and distinctly functional integrated circuit means and forms a continuous electrical path with the more than one metal system forming the Schottky barrier diodes.

公开(公告)号：CA1023856A

公开(公告)日：1978-01-03

申请号：CA171591

申请日：1973-05-15

Applicant: IBM

Inventor： DORLER JACK A ,  FORNERIS JOHN L ,  SWIETEK DONALD J

IPC: G11C11/41 ,  G11C11/39 ,  G11C13/00 ,  G11C17/14 ,  G11C17/16 ,  H01L27/00 ,  H01L27/102 ,  H01L29/47 ,  H01L29/86 ,  H01L29/872 ,  G11C11/34

Abstract: A process for forming a non-volatile storage element having symmetrical characteristics comprising the steps of forming a pair of back-to-back Schottky barrier diodes on a monolithic substrate and selectively passing current between the Schottky barrier diodes in opposite directions in order to form a non-volatile bistable storage element.

公开(公告)号：CA1000418A

公开(公告)日：1976-11-23

申请号：CA240987

申请日：1975-12-03

Applicant: IBM

Inventor： DORLER JACK A ,  FORNERIS JOHN L ,  SWIETEK DONALD J