PROCESS FOR PROVIDING A LANDLESS THROUGH-HOLE CONNECTION

    公开(公告)号:CA1245774A

    公开(公告)日:1988-11-29

    申请号:CA528725

    申请日:1987-02-02

    Applicant: IBM

    Abstract: PROCESS FOR PROVIDING A LANDLESS THROUGH-HOLE CONNECTION At least two conductors are electrically connected through a dielectric material by providing a dielectric material having a first conductor on a first surface thereof and a temporary support layer covering the first conductor and the first surface of the dielectric material. A second surface on the dielectric material opposite the first surface is provided with a second conductor and a temporary support layer covering the second conductor and second surface of the dielectric material. Intersticial through-holes are provided to connect the first and second conductors. The through-holes are plated with an electrical conductor to thereby electrically connect the first and second conductors. The support layers are then mechanically removed such as by peeling to thereby provide a landless electrical connection between the first and second electrical conductors.

    CLEANING OF HIGH ASPECT RATIO THROUGH HOLES IN MULTILAYER PRINTED CIRCUIT BOARDS

    公开(公告)号:CA1097823A

    公开(公告)日:1981-03-17

    申请号:CA310044

    申请日:1978-08-25

    Applicant: IBM

    Abstract: CLEANING OF HIGH ASPECT RATIO THROUGH HOLES IN MULTILAYER PRINTED CIRCUIT BOARDS A cleaning process for high aspect ratio through holes of multilayer printed circuit boards assures the removal of any loosened fiberous material or epoxy smears in the through holes and also provides an inverted "T" structure at the innerplanes of the internal conductive circuits within the printed circuit board sandwich. The inverted "T" structure helps to move the contact point between the plating of the through hole and internal circuit lines further into the circuit board, thereby eliminating the "Z" stress at the edge of the innerplane. This process is accomplished by first vapor blasting the through holes, soaking the board in a suitable solvent to loosen any fibers or smears on the circuit innerplanes of the board, removing the excess solvent from the through holes and then feeding a unilateral stream of a cleaning solution through the holes, the cleaning solution operating to remove excess fibers and smears in the through holes and to produce a slight, uniform etchback of the metal innerplanes of the printed circuit boards. Thereafter, the solution may be reduced and any excess cleaning solution is removed.

    ADHESION PROMOTER FOR ADDITIVELY PLATED PRINTED CIRCUIT BOARDS

    公开(公告)号:CA1094929A

    公开(公告)日:1981-02-03

    申请号:CA313822

    申请日:1978-10-20

    Applicant: IBM

    Abstract: ADHESION PROMOTER FOR ADDITIVELY PLATED PRINTED CIRCUIT BOARDS Subsequent to the additive plating of copper circuitry on a substrate and prior to further steps such as lamination to form a multilayer printed circuit board, a sequence of etching and cleaning steps are used to improve the lamination strength of the additively plated copper. The circuitized substrate is dipped in an etchant bath and then baked at an elevated temperature for 2-4 hours. Following this the circuitized substrate is washed with an organic cleaner, water rinsed and air dried. Thereafter a chlorite oxide layer is added to the circuitized substrate and it is ready for further processing. EN9-77-003 DLM/M14

    METHOD FOR MAKING A FLUSH SURFACE LAMINATE FOR A MULTILAYER CIRCUIT BOARD

    公开(公告)号:CA1283591C

    公开(公告)日:1991-04-30

    申请号:CA510743

    申请日:1986-06-03

    Applicant: IBM

    Inventor: ELLIS THERON L

    Abstract: A method for making flush circuit laminates for use in constructing a multilayer circuit board is disclosed. The method comprises laminating together a dielectric sheet(s) of material, such as glass cloth impregnated with epoxy resin, placed between predrilled or pre-punched sheets of a conductive material, such as copper, to form the desired flush circuit laminate, such as a flush surface power core, which, in turn, may be used with other laminates to construct the desired multilayer circuit board. This method allows thinner laminates to be made with acceptable dimensional tolerances which provide improved impedance characteristics compared to laminates made using conventional processes. Thus, the method provides a method of making a more compact, higher speed multilayer circuit board without sacrificing circuit density on the circuit board. If desired, the method may be carried out using all dry processes.

Patent Agency Ranking