公开(公告)号：GB2539129B

公开(公告)日：2017-06-21

申请号：GB201615597

申请日：2015-02-19

Applicant: IBM

Inventor： MAGED MILAD MICHAEL ,  MICHAEL KARL GSCHWIND ,  HAROLD WADE CAIN III ,  VALENTINA SALAPURA ,  ERIC MARK SCHWARZ

IPC: G06F9/30 ,  G06F9/38 ,  G06F11/07

公开(公告)号：GB2541333A

公开(公告)日：2017-02-15

申请号：GB201620508

申请日：2015-05-19

Applicant: IBM

Inventor： JOSE EDUARDO MOREIRA ,  HAROLD WADE CAIN III ,  DAVID DALY

IPC: G06F1/18 ,  H05K7/14

Abstract: There is provided an apparatus, a method and computer program product for managing one or more components of an electronic machine. A user connects one or more components to an electronic machine in parallel. The electronic machine determines whether the components are failed. A latch device, attached to each component, automatically locks one or more of the components to the electronic machine if the one or more of the components are not failed. The electromechanical latch automatically releases the one or more of the components from the electronic machine if the one or more of the components are failed.

公开(公告)号：BR112016021217B1

公开(公告)日：2022-08-09

申请号：BR112016021217

申请日：2015-03-11

Applicant: IBM

Inventor： ERIC MARK SCHWARZ ,  FADI YUSUF BUSABA ,  MICHAEL KARL GSCHWIND ,  TIMOTHY SLEGEL ,  VALENTINA SALAPURA ,  CHRISTIAN JACOBI ,  HAROLD WADE CAIN III

IPC: G06F12/08 ,  G06F9/38 ,  G06F9/46

Abstract: AUMENTO DE PROTOCOLO DE COERÊNCIA PARA INDICAR O ESTADO DA TRANSAÇÃO. Concretizações referem-se à implementação de um protocolo de coerência. Um aspecto inclui o envio de um pedido de dados a um processador remoto e receber, por um processador, uma resposta do processador remoto. A resposta tem um estado de transação de uma transação remota no processador remoto. O processador adiciona o estado de transação da transação remota no processador remoto em uma tabela de rastreamento de interferência de transação local.

公开(公告)号：GB2539129A

公开(公告)日：2016-12-07

申请号：GB201615597

申请日：2015-02-19

Applicant: IBM

Inventor： MAGED MILAD MICHAEL ,  MICHAEL KARL GSCHWIND ,  HAROLD WADE CAIN III ,  VALENTINA SALAPURA ,  ERIC MARK SCHWARZ

IPC: G06F9/30 ,  G06F9/38 ,  G06F11/07

Abstract: A transactional memory system salvages a partially executed hardware transaction. A processor of the transactional memory system determines information about an about-to-fail handler for transactional execution of a code region of a hardware transaction. The processor saves state information of the hardware transaction, the state information usable to determine whether the hardware transaction is to be salvaged or to be aborted. The processor detects an about-to-fail condition during the transactional execution of the hardware transaction. The processor, based on the detecting, executes the about-to-fail handler using the information about the about-to-fail handler, the about-to-fail handler determining whether the hardware transaction is to be salvaged or to be aborted.

公开(公告)号：GB2541333B

公开(公告)日：2019-10-09

申请号：GB201620508

申请日：2015-05-19

Applicant: IBM

Inventor： JOSE EDUARDO MOREIRA ,  HAROLD WADE CAIN III ,  DAVID DALY

IPC: G06F1/18 ,  H05K7/14

公开(公告)号：MX2016011905A

公开(公告)日：2016-12-02

申请号：MX2016011905

申请日：2015-03-11

Applicant: IBM

Inventor： SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  JACOBI CHRISTIAN ,  FADI YUSUF BUSABA ,  MICHAEL KARL GSCHWIND ,  VALENTINA SALAPURA ,  HAROLD WADE CAIN III

IPC: G06F12/08 ,  G06F9/38 ,  G06F9/46

Abstract: Las modalidades se relacionan con la implementación de un protocolo de coherencia. Un aspecto incluye enviar una petición de datos a un procesador remoto y recibir por medio de un procesador una respuesta del procesador remoto. La respuesta tiene un estado de transición de una transacción remota en el procesador remoto. El procesador agrega el estado de transacción de la transacción remota en el procesador remoto en la tabla de seguimiento de interferencia de transacción local.