CURRENT SOURCE AND METHOD FOR GENERATING CURRENT

    公开(公告)号:JP2000330658A

    公开(公告)日:2000-11-30

    申请号:JP2000065508

    申请日:2000-03-09

    Abstract: PROBLEM TO BE SOLVED: To prevent an output current from being affected by variations of temperature and an external voltage source by adding two currents which are opposite in temperature coefficient and supplying the current. SOLUTION: The current source 10 has a band-gap reference circuit 12, supplies a temperature-dependent current IBGR increasing as the temperature rises, and also supplies a temperature-dependent voltage VBGR to one input side of an amplifier 14 in response to the current IBGR. The drain of an MOSFETT1 connected to the output side of this amplifier 14 is connected to the other input side of the amplifier 14 to constitute a negative feedback mechanism. Further, a current mirror part 26 outputs a variable power current nIBGR to an addition node in response to the current IBGR supplied in the circuit 12. The current IR derived by dividing the voltage VBGR by a positive temperature coefficient resistance R is also supplied to the addition node 22. Consequently, the current source 10 supplies an output current IREF=nIBDR+IR to the addition node 22 to eliminate the influence of variations of the temperature T and power source 18.

    ANTI-FUSE STRUCTURE AND ITS FORMING METHOD

    公开(公告)号:JP2001345383A

    公开(公告)日:2001-12-14

    申请号:JP2001160548

    申请日:2001-05-29

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide an anti-fuse structure which can program at a low voltage and current, uses only in an extremely small chip base, and can be formed in a gap between parts which are disposed at intervals of a least lithographic feature size. SOLUTION: An anti-fuse structure is formed on an SOI substrate in combination with a capacitor-like structure which reaches support layer or in the support layer by etching a contact which penetrates an insulator and reaches the support semiconductor layer. This anti-fuse can be programmed by selecting a position forming a conductor or damaging a dielectric of the capacitor-like structure. It is possible to restrict the damages to a desirable position by use of an insulation collar enclosing the conductor or a part of the capacitor-like structure. Thermal influences due to a programming current are isolated into the interior of a bulk silicon layer, whereby a programming during a normal operation of a device is enabled.

    GAIN MEMORY CELL CIRCUIT
    3.
    发明专利

    公开(公告)号:JPH10241358A

    公开(公告)日:1998-09-11

    申请号:JP2699798

    申请日:1998-02-09

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To prevent read-out disturbance from an unselected cell by reading out a written word value stored on a storage node by means of a read transistor via a diode between bit lines. SOLUTION: When a write transistor Tw0 in a gain cell 20 is operated by a write-in word line WLW0, a value of a write-in bit line BLW0 is stored on the storage node SN0. When a read-out word line WLR0 is enabled to work, the read transistor Tr0 to be connected with the storage node SN0 in this case is connected via the diode D0 to a read-out bit line BLR0, so as to read out the stored value. The diode D0 is capable of preventing conductivity in the reverse direction of the read transistor Tr0, thus preventing disturbance from another cell, and also decreasing capacitance of the bit line. The same is the case with the other memory cells.

    4.
    发明专利
    未知

    公开(公告)号:DE69509806T2

    公开(公告)日:1999-11-11

    申请号:DE69509806

    申请日:1995-01-27

    Applicant: SIEMENS AG IBM

    Abstract: An off-chip driver with regulated supplies compensates for power supply fluctuations. The circuit reduces di/dt noise by providing complementary voltage regulators to regulate the high and low supplies to the driver stages such that they see a constant operating voltage regardless of changes in supply voltage, VCC. The circuit uses two push-pull stages which charge and discharge the output load capacitance, C0. This regulated voltage to the driver stages reduces di/dt noise and provides a constant overdrive voltage, constant gate slew rate, and constant staging delay over a specified external supply voltage range.

    5.
    发明专利
    未知

    公开(公告)号:DE69509806D1

    公开(公告)日:1999-07-01

    申请号:DE69509806

    申请日:1995-01-27

    Applicant: SIEMENS AG IBM

    Abstract: An off-chip driver with regulated supplies compensates for power supply fluctuations. The circuit reduces di/dt noise by providing complementary voltage regulators to regulate the high and low supplies to the driver stages such that they see a constant operating voltage regardless of changes in supply voltage, VCC. The circuit uses two push-pull stages which charge and discharge the output load capacitance, C0. This regulated voltage to the driver stages reduces di/dt noise and provides a constant overdrive voltage, constant gate slew rate, and constant staging delay over a specified external supply voltage range.

    7.
    发明专利
    未知

    公开(公告)号:AT180605T

    公开(公告)日:1999-06-15

    申请号:AT95101166

    申请日:1995-01-27

    Applicant: SIEMENS AG IBM

    Abstract: An off-chip driver with regulated supplies compensates for power supply fluctuations. The circuit reduces di/dt noise by providing complementary voltage regulators to regulate the high and low supplies to the driver stages such that they see a constant operating voltage regardless of changes in supply voltage, VCC. The circuit uses two push-pull stages which charge and discharge the output load capacitance, C0. This regulated voltage to the driver stages reduces di/dt noise and provides a constant overdrive voltage, constant gate slew rate, and constant staging delay over a specified external supply voltage range.

    DEFECT LEAKAGE SCREEN SYSTEM
    8.
    发明专利

    公开(公告)号:CA1242246A

    公开(公告)日:1988-09-20

    申请号:CA485183

    申请日:1985-06-25

    Applicant: IBM

    Abstract: Defect Leakage Screen System A test circuit or system is provided wherein data is stored in circuits or cells of an array or matrix with the use of conventional or normal operating voltages. Voltages at internal nodes of the circuits or cells are altered to magnitudes beyond the normal operating ranges, which includes significantly decreasing the offset voltage, for a short period of time and then the stored data is read out at normal-voltages and currents and compared with the data written into the circuits or cells.

    STRUCTURES AND METHODS OF ANTI-FUSE FORMATION IN SOI

    公开(公告)号:MY134452A

    公开(公告)日:2007-12-31

    申请号:MYPI20054051

    申请日:2001-05-23

    Applicant: IBM

    Abstract: AN ANTI-FUSE STRUCTURE THAT CAN BE PROGRAMMED AT LOW VOLTAGE AND CURRENT AND WHICH POTENTIALLY CONSUMES VERY LITTLE CHIP SPACES AND CAN BE FORMED INTERSTITIALLY BETWEEN ELEMENTS SPACED BY A MINIMUM LITHOGRAPHIC FEATURE SIZE IS FORMED ON A COMPOSITE SUBSTRATE SUCH AS A SILICON-ONINSULATOR WAFER BY ETCHING A CONTACT THROUGH AN INSULATOR TO A SUPPORT SEMICONDUCTOR LAYER, PREFERABLY IN COMBINATION WITH FORMATION OF A CAPACITOR-LIKE STRUCTURE REACHING TO OR INTO THE SUPPORT LAYER. THE ANTI-FUSE MAY BE PROGRAMMED EITHER BY THE SELECTED LOCATION OF CONDUCTOR FORMATION AND/OR DAMAGING A DIELECTRIC OF THE CAPACITOR-LIKE STRUCTURE. AN INSULATING COLLAR (38, 90) IS USED TO SURROUND A PORTION OF EITHER THE CONDUCTOR (42, 100) OR THE CAPACITOR-LIKE STRUCTURE TO CONFINE DAMAGE TO THE DESIRED LOCATION.HEATING EFFECTS VOLTAGE AND NOISE DUE TO PROGRAMMING CURRENTS ARE EFFECTIVELY ISOLATED TO THE BULK SILICON LAYER, PERMITTING PROGRAMMING DURING NORMAL OPERATION OF THE DEVICE. THUS THE POTENTIAL FOR SELF-REPAIR WITHOUT INTERRUPTION OF OPERATION IS REALIZED.(FIG 6)

    Off-chip driver with voltage regulated predrive

    公开(公告)号:HK1013371A1

    公开(公告)日:1999-08-20

    申请号:HK98114521

    申请日:1998-12-21

    Applicant: SIEMENS AG IBM

    Abstract: An off-chip driver with regulated supplies compensates for power supply fluctuations. The circuit reduces di/dt noise by providing complementary voltage regulators to regulate the high and low supplies to the driver stages such that they see a constant operating voltage regardless of changes in supply voltage, VCC. The circuit uses two push-pull stages which charge and discharge the output load capacitance, C0. This regulated voltage to the driver stages reduces di/dt noise and provides a constant overdrive voltage, constant gate slew rate, and constant staging delay over a specified external supply voltage range.

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