Abstract:
Errors in parallel binary data produced by a plurality of data track, e.g., a plurality of parallel shift registers, are corrected by a system in which the shift registers which are stuck, i.e., inalterable, are determined and counted. By single Hamming error detection means, the presence of a Hamming error and an indication of the bit position of a single Hamming error is made. Comparison means determine if the indicated Hamming error is coincident with a stuck track. Then, dependent on the parity condition of the data as well as the count of stuck tracks, apparatus is provided for complementing one or more of the stuck tracks and/or correcting the indicated Hamming error.
Abstract:
Errors in parallel binary data produced by a plurality of data track, e.g., a plurality of parallel shift registers, are corrected by a system in which the shift registers which are stuck, i.e., inalterable, are determined and counted. By single Hamming error detection means, the presence of a Hamming error and an indication of the bit position of a single Hamming error is made. Comparison means determine if the indicated Hamming error is coincident with a stuck track. Then, dependent on the parity condition of the data as well as the count of stuck tracks, apparatus is provided for complementing one or more of the stuck tracks and/or correcting the indicated Hamming error.
Abstract:
PRESENCE/ABSENCE BAR CODE A single width bar code exhibiting inherent self clocking characteristics is provided so as to be particularly useful in the identification of semiconductor wafers in very large scale integrated circuit manufacturing processes. The codes described herein are robust, reliable and highly readable even in the face of relatively high variations in scanning speed The codes are also desirably dense in terms of character representations per linear centimeter, an important consideration in semiconductor manufacturing wherein space on the chips and the wafer is at a premium. Additionally, a preferred embodiment of the present invention exhibits a minimum number for the maximum number of spaces between adjacent bars in code symbol sequences. P09-89-002
Abstract:
METHOD AND APPARATUS FOR PROVIDING ERROR CORRECTION AND SYMBOL LEVEL CODES An error correction coding system employs a single check symbol from an arbitrary sequence of information symbols to provide single error correction at the symbol level. The sequence of information symbols may in fact also be arbitrarily long. The coding system of the present invention provides both a method and apparatus for encoding the check symbol and a method and apparatus for error correction based upon the single coded symbol character. The system is particularly applicable for use in conjunction with bar code recognition systems but is in fact applicable to a broad range of coding systems, including optical character recognition and ordinary alphanumeric codes. The system is also extendable to any system employing an odd number of code symbols that may be present in a single character position.