公开(公告)号：CA1238719A

公开(公告)日：1988-06-28

申请号：CA503081

申请日：1986-03-03

Applicant: IBM

Inventor： FREEOUF JOHN L ,  JACKSON THOMAS N ,  KIRCHNER PETER D

IPC: H01L29/812 ,  H01L21/338 ,  H01L27/10 ,  H01L29/205 ,  H01L29/778 ,  H01L29/80 ,  G11C11/40

Abstract: YO984-085 REVERSIBLE CHARGE STORAGE FLOATING GATE HETEROJUNCTION DEVICE A semiconductor storage device provides reversible control of conduction in a band offset heterojunction field effect transistor by providing an asymmetric barrier controlled charge storage capability that can position a potential well across the Fermi level to produce conduction and away from the Fermi level for a non-conducting condition and to retain that position in the absence of a signal. A GaAs channel FET with a multilayer gate of in order of proximity to the GaAs channel a gate layer of GaAlAs, a storage layer of GaAs, an asymmetric barrier layer of GaAlAs graded toward the GaAs storage layer and an ohmic adapting layer of GaAs.

公开(公告)号：CA1244149A

公开(公告)日：1988-11-01

申请号：CA503080

申请日：1986-03-03

Applicant: IBM

Inventor： FREEOUF JOHN L ,  JACKSON THOMAS N ,  KIRCHNER PETER D ,  TANG JEFFREY Y-F ,  WOODALL JERRY M

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/68 ,  H01L29/737 ,  H01L29/76 ,  H01L29/06

Abstract: SEMICONDUCTOR BALLISTIC ELECTRON VELOCITY CONTROL STRUCTURE A semiconductor device where an emitter material composition and doping profile produces an electron gas in a base adjacent a hand offset heterojunction interface, the electrons in the electron gas in the base are confined under bias by a low barrier and the ballistic carriers have their kinetic energy controlled to prevent intervalley scattering by an electrostatic barrier that under influence of bias provides an essentially level conduction band in the portion of the base adjacent the collector.

公开(公告)号：DE3851175T2

公开(公告)日：1995-03-30

申请号：DE3851175

申请日：1988-02-24

Applicant: IBM

Inventor： JACKSON THOMAS N

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/167 ,  H01L29/207 ,  H01L29/267 ,  H01L29/737 ,  H01L29/423

Abstract: A vertical heterojunction equal area transistor is provided in which three epitaxial layers structure with wide band gap external layers (2, 4) and narrower band gap center layer (3) is provided with impurity concentrations outside a center portion (7, 8) such that the area around the wide gap electrodes is high resistivity and the area around the center narrower gap region is high conductivity. At least one ohmic contact (25) is formed to the area around the center narrower gap regions (3), said contact (25) being separated from the center portion (7, 8) by a portion of one of the external layers (4).

公开(公告)号：DE3851175D1

公开(公告)日：1994-09-29

申请号：DE3851175

申请日：1988-02-24

Applicant: IBM

Inventor： JACKSON THOMAS N

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/167 ,  H01L29/207 ,  H01L29/267 ,  H01L29/737 ,  H01L29/60

Abstract: A vertical heterojunction equal area transistor is provided in which three epitaxial layers structure with wide band gap external layers (2, 4) and narrower band gap center layer (3) is provided with impurity concentrations outside a center portion (7, 8) such that the area around the wide gap electrodes is high resistivity and the area around the center narrower gap region is high conductivity. At least one ohmic contact (25) is formed to the area around the center narrower gap regions (3), said contact (25) being separated from the center portion (7, 8) by a portion of one of the external layers (4).