公开(公告)号：MY123561A

公开(公告)日：2006-05-31

申请号：MYPI20012196

申请日：2001-05-11

Applicant: IBM

Inventor： JOHN S KRESGE ,  FRANCIS J DOWNES JR ,  GERALD W JONES ,  CHERYL L TYTRAN-PALOMAKI ,  DAVID JANES ALCOE

IPC: H01L23/498 ,  H05K1/11 ,  H05K3/46

Abstract: A SEMICONDUCTOR CHIP CARRIER HAVING AN INCREASED CHIP CONNECTOR AND PLATED THROUGH HOLE DENSITY. IN PARTICULAR, A SUBSTRATE (100) HAVING A PLURALITY OF PLATED THROUGH HOLES (132) THEREIN, AND A FATIGUE RESISTANT REDISTRIBUTION LAYER (138) THEREON. THE REDISTRIBUTION LAYER INCLUDES A PLURALITY OF VIAS(140) SELECTIVELY POSITIONED OVER AND CONTACTING THE PLATED THROUGH HOLES.THE SUBSTRATE FURTHER INCLUDING A GROUND PLANE (112), TWO PAIR OF SIGNAL PLANES (116, 124), AND TWO PAIR OF POWER PLANES(120, 128), WHEREIN THE SECOND PAIR OF POWER PLANES ARE LOCATED DIRECTLY UNDERNEATH THE EXTERNAL DIELECTRIC LAYER. A BURIED PLATED THROUGH HOLE (146) WITHIN THE SUBSTRATE. (FIG.8A)

公开(公告)号：MY124761A

公开(公告)日：2006-07-31

申请号：MYPI20002939

申请日：2000-06-28

Applicant: IBM

Inventor： JOHN S KRESGE ,  ROBERT D SEBESTA ,  DAVID B STONE ,  JAMES R WILCOX

IPC: H01L23/32 ,  H05K1/14 ,  H01L23/373 ,  H01L23/498 ,  H05K1/11 ,  H05K3/42 ,  H05K3/46

Abstract: AN ELECTRONIC PACKAGE (10) AND METHOD OF MAKING THE ELECTRONIC PACKAGE IS PROVIDED.THE PACKAGE INCLUDES A SEMICONDUCTOR CHIP (12) AND AN MULTI-LAYERED INTERCONNECT STRUCTURE (18).THE SEMICONDUCTOR CHIP INCLUDES A PLURALITY OF CONTACT MEMBERS (16) ON ONE OF ITS SURFACES THAT ARE CONNECTED TO THE MULTI-LAYERED INTERCONNECT STRUCTURE BY A PLURALITY OF SOLDER CONNECTIONS (47).THE MULTI-LAYERED INTERCONNECT STRUCTURE IS ADAPTED FOR ELECTRICALLY INTERCONNECTING THE SEMICONDUCTOR CHIP TO A CIRCUITIZED SUBSTRATE (100) (EG.,CIRCUIT BOARD) WITH ANOTHER PLURALITY OF SOLDER CONNECTIONS (20) AND INCLUDES A THERMALLY CONDUCTIVE LAYER (22) BEING COMPRISED OF A MATERIAL HAVING A SELECTED THICKNESS AND COEFFICIENT OF THERMAL EXPANSION TO SUBSTANTIALLY PREVENT FAILURE OF THE SOLDER CONNECTIONS BETWEEN SAID FIRST PLURALITY OF ELECTRICALLY CONDUCTIVE MEMBERS AND THE SEMICONDUCTOR CHIP. THE ELECTRONIC PACKAGE FURTHER INCLUDES A DIELECTRIC MATERIAL HAVING AN EFFECTIVE MODULUS TO ASSURE SUFFICIENT COMPLIANCY OF THE MULTI-LAYERED INTERCONNECT STRUCTURE DURING OPERATION.(FIG 1)

公开(公告)号：HK1040569B

公开(公告)日：2005-12-09

申请号：HK02101938

申请日：2002-03-13

Applicant: IBM

Inventor： DAVID J ALCOE ,  FRANCIS J DOWNES JR ,  GERALD W JONES ,  JOHN S KRESGE ,  CHERYL L TYTRAN-PALOMAKI

IPC: H01L20060101 ,  H01L23/498 ,  H05K20060101 ,  H05K3/46