公开(公告)号：JPH1174196A

公开(公告)日：1999-03-16

申请号：JP19275998

申请日：1998-07-08

Applicant: IBM

Inventor： JEFFREY S BROWN ,  JAMES S DUNE ,  STEPHEN J HORMES ,  KAKU K HYUIN ,  LEIDY ROBERT K ,  PAUL W PASTELL

IPC: H01L29/78 ,  G03F7/095 ,  G03F7/38 ,  H01L21/027 ,  H01L21/265 ,  H01L21/311 ,  H01L21/336

Abstract: PROBLEM TO BE SOLVED: To enable junctions of a gate/source and a gate/drain to be enhanced in control in doping by a method, wherein a side wall spacer trough is demarcated by the use of a hybrid resist. SOLUTION: A wafer is prepared, and a hybrid resist layer is attached to the wafer, exposed to light through a mask, and developed (302 to 308) for the formation of a sidewall spacer. A hard mask is etched through a spacer (301), a uniform exposure process and a development process are carried out (312), a gate matter is etched through the residual hard mask (314), and a sidewall spacer trough is formed. Then, the exposed hard mask and a negative-type hybrid resist are removed (316 and 313), and a gate edge implant is formed (320). Then, a sidewall oxide and a nitride stopper are attached (322), an excess sidewall spacer matter and an excess gate matter are removed (326 and 328), and are injected (330) to a source and a drain region.