公开(公告)号：US3669769A

公开(公告)日：1972-06-13

申请号：US3669769D

申请日：1970-09-29

Applicant: IBM

Inventor： BADAMI ANGELO V ,  EBERT EKKEHARD ,  KEMLAGE BERNARD M ,  KROELL KARL E ,  POGGE H BERNHARD

IPC: C30B25/02 ,  H01L21/205 ,  H01L21/22 ,  H01L7/36 ,  C23C13/00

CPC classification number: C30B29/06 ,  C30B25/02 ,  C30B29/08 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/2205 ,  Y10S148/007 ,  Y10S148/037 ,  Y10S148/145 ,  Y10S438/916

Abstract: AUTODOPING IS MINIMIZED DURING THE GROWTH OF AN EPITAXIAL LAYER OF A SEMICONDUCTOR SUBSTRATE BY USING A GASEOUS REACTION MIXTURE THAT DEPOSITS THE INITIAL CAPPING LAYER AT A RELATIVELY SLOW DEPOSITION RATE. THE REACTION MIXTURE CONTAINS A RELATIVELY MINOR PORTION OF A SEMICONDUCTOR COMPOUND ALONG WITH THE CARRIER GAS. SUBSEQUENTLY, A SECOND GASEOUS REACTION MIXTURE CONTAINING A GREATER PORTION OF A COMPOUND OF A SEMICONDUCTOR MATERIAL IS USED TO COMPLETE THE DEPOSITION OF THE EPITXIAL LAYER. THIS IS DONE MERELY TO REDUCE THE TOTAL GROWTH CYCLE.

公开(公告)号：US3698947A

公开(公告)日：1972-10-17

申请号：US3698947D

申请日：1970-11-02

Applicant: IBM

Inventor： KEMLAGE BERNARD M ,  POGGE HANS B

IPC: H01L21/00 ,  H01L21/20 ,  B44D1/18

CPC classification number: H01L21/02381 ,  H01L21/00 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02642 ,  H01L21/02664 ,  Y10S148/043 ,  Y10S148/051 ,  Y10S148/061 ,  Y10S148/065 ,  Y10S148/071 ,  Y10S148/085 ,  Y10S148/122 ,  Y10S438/969

Abstract: A METHOD WHEREIN AN AMORPHOUS MATERIAL IS INITIALLY DEPOSITED ON A MONOCRYSTALLINE SUBSTRATE AND WHEREIN SUBSEQUENTLY SELECTED PORTIONS OF THE AMORPHOUS LAYER ARE REMOVED TO EXPOSE PORTIONS OF THE SURFACE OF THE MONOCRYSTALLINE SUBSTRATE. A THIN LAYER OF A POLYCRYSTALLINE SEMICONDUCTOR MATERIAL IS DEPOSITED OVER THE WHOLE WAFER. THE REMAINING PORTIONS OF THE AMROPHOUS LAYER ARE REMOVED INCLUDING THE OVERLYING POLYCRYSTALLINE MATERIAL. A LAYER OF SEMICONDUCTOR MATERIAL IS DEPOSITED ON THE SUBSTRATE UNDER EPITAXIAL GROWTH CONDITIONS WHICH WILL FORM POLYCRYSTALLINE MATERIAL OVER THE REMAINING POLYCRYSTALLINE REGIONS AND EPITAXIAL MATERIAL OVER THE EXPOSED MONOCRYSTALLINE REGIONS OF THE SUBSTRATE.

公开(公告)号：CA1166128A

公开(公告)日：1984-04-24

申请号：CA354063

申请日：1980-06-16

Applicant: IBM

Inventor： KEMLAGE BERNARD M

IPC: H01L21/316 ,  C23C16/40 ,  H01L21/365

Abstract: LOW PRESSURE CHEMICAL VAPOR DEPOSITION OF SILICON DIOXIDE WITH OXYGEN ENHANCEMENT OF THE CHLOROSILANE-NITROUS OXIDE REACTION A method is described for forming a silicon dioxide layer on a semiconductor substrate in a furnace heated reaction zone of a chemical vapor deposition reactor having an input end for gaseous reactants wherein the silicon dioxide layer is not subject to degradation during subsequent oxidation cycles. A gaseous chlorosilane is mixed with nitrous oxide gas in the reactor. Oxygen gas is added, between about 0.25% to 10% by volume of total reactive gas mixture, to the chlorosilane and nitrous oxide gases in the reaction zone where the temperature is between about 800.degree.C to 1200.degree.C in a pressure of less than about 5 torr to deposit the silicon dioxide layer onto the substrate. FI9-79-018

公开(公告)号：CA1166129A

公开(公告)日：1984-04-24

申请号：CA354064

申请日：1980-06-16

Applicant: IBM

Inventor： KEMLAGE BERNARD M

IPC: H01L21/316 ,  C23C16/40 ,  H01L21/365

Abstract: PREVENTION OF LOW PRESSURE CHEMICAL VAPOR DEPOSITION SILICON DIOXIDE UNDERCUTTING AND FLAKING A chemical vapor deposition process wherein a silicon nitride, or the like, barrier layer of the order of 50 to 3000.ANG. is formed over a silicon substrate ar.d a low pressure chemical vapor deposition of a chlorosilane and a nitrous oxide oxidizing gas is used to form a silicon dioxide over the silicon nitride layer. This process overcomes the problem of the low pressure chemical vapor deposition of silicon dioxide that does not use the silicon nitride layer. The problem is degradation of the silicon dioxide layer during subsequent oxidation cycles. FI9-79-019

公开(公告)号：FR2295575A1

公开(公告)日：1976-07-16

申请号：FR7533264

申请日：1975-10-20

Applicant: IBM

Inventor： KEMLAGE BERNARD M ,  WOODALL JERRY M ,  WUESTENHOEFER WILLIAM C

IPC: H01L21/205 ,  H01L33/00

Abstract: A process for producing light emitting diodes is disclosed. In the process a primer layer of GaP is pyrolytically deposited on a Si substrate with the resulting epitaxial film thickness being sufficient to form complete coalescence of the epitaxial nuclei, but thin enough to avoid cracks in the epitaxial layer due to stress induced by thermal expansion. The thickness is generally between 1-2 mu . A second layer of GaP is then deposited using the standard halide transport process with thicknesses of 10-20 mu with the graded addition of AsH3, until the particularly desired design composition of GaAsP is obtained. A constant layer of GaAsP is grown on the graded layer.

公开(公告)号：FR2295568A1

公开(公告)日：1976-07-16

申请号：FR7532220

申请日：1975-10-13

Applicant: IBM

Inventor： BROADIE ROBERT W ,  KEMLAGE BERNARD M ,  POGGE HANS B

IPC: H01L21/205 ,  H01L33/00 ,  H01L21/36