Abstract:
An improved hardware circuit simulation method in particular for history-dependent and cyclic operation sensible hardware circuits, like SOI-type hardware, for example, checks for correct cyclic boundary conditions by performing (110) a first run of a prior art DC simulation with input voltage conditions belonging to CYCLE START, and by carrying out (120) a second DC simulation with input voltage conditions belonging to CYCLE STOP. After comparing (130) the results, e.g., comparing the node voltages, any mismatches can be determined which serve as a hint to non-compatibility with cyclic operation. Thus, the design is able to be re-designed (140) before being simulated in vain with a great amount of work and computing time. A transient simulation (150) can be appended for automated correction (160, 170) of dynamic errors.