公开(公告)号：GB2617496B

公开(公告)日：2024-12-25

申请号：GB202310214

申请日：2021-11-09

Applicant: IBM

Inventor： KEVIN WAYNE BREW ,  WEI WANG ,  INJO OK ,  LAN YU ,  YOUNGSEOK KIM

IPC: G11C11/15 ,  G06F12/02 ,  G11C13/00

Abstract: An embodiment in the application may include an analog memory structure, and methods of writing to such a structure, including a volatile memory element in series with a non-volatile memory element. The analog memory structure may change resistance upon application of a voltage. This may enable accelerated writing of the analog memory structure.

公开(公告)号：GB2628728A

公开(公告)日：2024-10-02

申请号：GB202408798

申请日：2022-11-28

Applicant: IBM

Inventor： LAN YU ,  KANGGUO CHENG ,  HENG WU ,  CHEN ZHANG

IPC: H01L29/66

Abstract: Embodiments of the present invention are directed to methods and resulting structures for nanosheet devices having defect free channels. In a non-limiting embodiment of the invention, a nanosheet stack is formed over a substrate. The nanosheet stack includes alternating first sacrificial layers and second sacrificial layers. One layer of the first sacrificial layers has a greater thickness than the remaining first sacrificial layers. The first sacrificial layers are removed and semiconductor layers are formed on surfaces of the second sacrificial layers. The semiconductor layers include a first set and a second set of semiconductor layers. The second sacrificial layers are removed and an isolation dielectric is formed between the first set and the second set of semiconductor layers.