公开(公告)号：GB2616573B

公开(公告)日：2025-02-19

申请号：GB202309314

申请日：2021-10-21

Applicant: IBM

Inventor： YOUNGSEOK KIM ,  CHOONGHYUN LEE ,  TIMOTHY MATHEW PHILIP ,  SOON-CHEON SEO ,  INJO OK ,  ALEXANDER REZNICEK

IPC: G11C11/00 ,  G11C13/00 ,  H10B63/00 ,  H10N70/20

Abstract: A vertical resistive memory array is presented. The array includes a pillar electrode and a switching liner around the side perimeter of the pillar electrode. The array includes two or more vertically stacked single cell (SC) electrodes connected to a first side of the switching liner. The juxtaposition of the switching liner, the pillar electrode, and each SC electrode forms respective resistance switching cells (e.g., OxRRAM cell). A vertical group or bank of these cells may be connected in parallel and each share the same pillar electrode. The cells in the vertical cell bank may written to or read from as a group to limit the effects of inconsistent CF formation of any one or more individual cells within the group.

公开(公告)号：GB2605288A

公开(公告)日：2022-09-28

申请号：GB202207233

申请日：2020-10-27

Applicant: IBM

Inventor： YOUNGSEOK KIM ,  INJO OK ,  ALEXANDER REZNICEK ,  SOON-CHEON SEO

IPC: G11C13/00 ,  H01L45/00

Abstract: A low forming voltage NVM device is provided by forming a pair of sacrificial conductive pads on an interconnect dielectric material layer that embeds a pair of second electrically conductive structures and a patterned material stack. One of the sacrificial conductive pads has a first area and contacts a surface of one of the second electrically conductive structures that contacts a surface of an underlying first electrically conductive structure, and the other of the sacrificial conductive pads has a second area, different from the first area, and contacts a surface of another of the second electrically conductive structures that contacts a surface of a top electrode of the patterned material stack. A plasma treatment is performed to induce an antenna effect and to convert a dielectric switching material of the patterned material stack into a conductive filament. After plasma treatment, the pair of sacrificial conductive pads is removed.

公开(公告)号：GB2617496B

公开(公告)日：2024-12-25

申请号：GB202310214

申请日：2021-11-09

Applicant: IBM

Inventor： KEVIN WAYNE BREW ,  WEI WANG ,  INJO OK ,  LAN YU ,  YOUNGSEOK KIM

IPC: G11C11/15 ,  G06F12/02 ,  G11C13/00

Abstract: An embodiment in the application may include an analog memory structure, and methods of writing to such a structure, including a volatile memory element in series with a non-volatile memory element. The analog memory structure may change resistance upon application of a voltage. This may enable accelerated writing of the analog memory structure.