公开(公告)号：US6437252B2

公开(公告)日：2002-08-20

申请号：US74145500

申请日：2000-12-19

Applicant: IBM

Inventor： REHM SIMONE ,  FRECH ROLAND ,  KLINK ERICH ,  VIRAG HELMUT ,  WINKEL THOMAS-MICHAEL ,  BECKER WIREN ,  CHAMBERLIN BRUCE ,  MA WAI

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/42

CPC classification number: H05K1/113 ,  H05K1/0231 ,  H05K1/115 ,  H05K3/429 ,  H05K2201/09472 ,  H05K2201/0979 ,  H05K2201/10522 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/4913

Abstract: Described is a method for minimizing switching noise in the high- and mid-frequency range on printed circuit cards or boards by means of a plurality of surface mounted decoupling capacitors. A novel configuration and implementation of capacitor pads including the connecting vias is also presented. As a result the parasitic inductance of the pads and vias can be significantly reduced. Thus the effectiveness of the decoupling capacitors in the mid and high frequency range can be increased, the voltage drop can be reduced and the system performance can be increased. Several design rules for the new pad via configuration lead to the significant reduction of the parasitic inductance. The proposal is especially important for high integrated system designs on boards and cards combined with increased cycle times.

Abstract translation: 描述了一种通过多个表面安装的去耦电容器来最小化印刷电路板或板上的高频和中频范围内的开关噪声的方法。 还介绍了包括连接通孔的电容器焊盘的新颖配置和实现。 结果，焊盘和通孔的寄生电感可以显着降低。 因此，可以提高中高频区域中的去耦电容器的有效性，可以降低电压降并且可以提高系统性能。 新焊盘通过配置的几个设计规则导致寄生电感的显着减少。 该建议对于板卡和卡上的高集成系统设计以及增加的周期时间尤其重要。