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    METHOD AND MEANS FOR ADDRESSING A VERY LARGE MEMORY
    1.
    发明专利
    METHOD AND MEANS FOR ADDRESSING A VERY LARGE MEMORY 未知

    公开(公告)号：CA2075305C

    公开(公告)日：1998-09-29

    申请号：CA2075305

    申请日：1992-08-05

    Applicant: IBM

    Inventor： BAUM RICHARD I ,  CARLSON BRENT A ,  KIM MOON J ,  MALL MICHAEL G ,  SCALZI CASPER A ,  SINHA BHASKAR

    IPC: G06F9/32 ,  G06F9/355 ,  G06F12/02 ,  G06F12/06 ,  G06F12/10 ,  G06F13/16 ,  G06F15/16

    Abstract: Provides relatively simple ways to obtain and control extenders (EXRs) for extending the size of small real and absolute addresses (up to 31 bit) to enable them to locate data or program entities anywhere in a very large memory (greater than 2**31). The EXR is concatenated to the high-order end of a conventionally-generated real or absolute address of less than 32 bit size to provide a real/absolute address of greater than 31 bit size (e.g. 63 bits). Each EXR value defines a section of a very large memory. The type of EXR location being used is indicated by having a CP extended address mode (CPEAM) field in a control register (CR). The CPEAM field indicates if the CP EXR field is associated with ARs, PTEs, STEs or ASTEs, or if a compatibility mode exists requiring no extender. When a CP program operates in the DAT-OFF mode, the EXR is contained in a register associated with a base register being currently used for operand address generation. When the CP is operating in DAT-ON mode, several different types of fields may be indicated, and the indicated EXR type is accessed during the address translation process, such when accessing an ASTEs, STE or PTE. The EXR field associated with the ASTE, STE or PTE is not used in the address translation process, but are only for address extension. By not affecting the translation process, the disclosure maintains downward compatibility for programs providing conventional small (e.g.31 bit) translated real addresses. Furthermore, an I/O EAM field is provided in a control block with each asynchronous I/O program to indicate the type of location being used for an I/O EXR field for providing the I/O EXR. The IOEAM field indicates if the I/O EXR field is associated with an ORB, CCWs, or IDAWs, or if a compatibility mode exists requiring no extender for I/O addressed data. This allows the I/O data of an I/O program to be mapped into one or plural sections of a very large memory, which may be the same or different from the section(s) addressed by the CP EXR.

    NONHIERARCHICAL PROGRAM AUTHORIZATION MECHANISM
    2.
    发明专利
    NONHIERARCHICAL PROGRAM AUTHORIZATION MECHANISM 未知

    公开(公告)号：CA1313424C

    公开(公告)日：1993-02-02

    申请号：CA587711

    申请日：1989-01-06

    Applicant: IBM

    Inventor： BAUM RICHARD I ,  BORDEN TERRY L ,  BUTWELL JUSTIN R ,  CLARK CARL E ,  GANEK ALAN G ,  LUM JAMES ,  MALL MICHAEL G ,  PAGE DAVID R ,  PLAMBECK KENNETH E ,  SCALZI CASPER A ,  SCHMALZ RICHARD J

    IPC: G06F12/08 ,  G06F9/46 ,  G06F12/10 ,  G06F12/14 ,  G06F21/24

    Abstract: PO9-87-006 NONHIERARCHICAL PROGRAM AUTHORIZATION MECHANISM A program authorization mechanism for authorizing access to an address space in the main memory of a computer system by a program being run under a multiple address space facility. An access-list entry is associated with each address space, each access-list entry being designated by an access list-entry token contained in an access register. Each access-list entry includes a private indicator which indicates if the associated address space can be accessed by all programs from this access-list entry or if the associated address space can only be accessed by an authorized program. For a program to be authorized, an extended authorization index in a control register must match an access-list extended authorization index in the access-list entry, or the extended authorization index value must be authorized in an authority table associated with the address space. An instruction for testing a given extended authorization index for a given access-list-entry is also disclosed.

    METHOD OF SECURING OF ACCES PROTECTION FOR DATA BLOCKS AND THE DEVICE FOR REALIZATION OF THIS METHOD
    5.
    发明专利
    METHOD OF SECURING OF ACCES PROTECTION FOR DATA BLOCKS AND THE DEVICE FOR REALIZATION OF THIS METHOD 未知

    公开(公告)号：SK136193A3

    公开(公告)日：1994-08-10

    申请号：SK136193

    申请日：1992-04-29

    Applicant: IBM

    Inventor： CLARK CARL E ,  SCALZI CASPER A ,  MALL MICHAEL G ,  SINHA BHASKAR

    IPC: G06F12/14 ,  G06F21/24

    Abstract: Provides three access levels of storage key protection, comprising a supervisory level (key 0), an intermediate level of non-public and non-supervisory keys (keys 1-8, 10-15), and an unique public level (key 9). The program routines operating with a supervisory-level access key can access both the public level and the intermediate level of storage blocks. Although a program routine operating with an access key in the intermediary access level cannot access any supervisory level storage block, it can access any block assigned a public level storage key, as well as any storage block assigned the respective intermediate level key. One or more third-level public storage keys (PSKs) may be provided. A program access key using one of the PSK values can only access blocks having the same PSK value, and it cannot access blocks having any other key value.

    DOMAIN RELATED ACCESS LISTS
    6.
    发明专利
    DOMAIN RELATED ACCESS LISTS 未知

    公开(公告)号：CA1293811C

    公开(公告)日：1991-12-31

    申请号：CA583573

    申请日：1988-11-18

    Applicant: IBM

    Inventor： CLARK CARL E ,  GANEK ALAN G ,  MALL MICHAEL G ,  PAGE DAVID R

    IPC: G06F12/08 ,  G06F9/46 ,  G06F12/02 ,  G06F12/10 ,  G06F12/14

    Abstract: PO987-007 DOMAIN RELATED ACCESS LISTS A method and apparatus is provided to translate the contents of access registers into information for use in performing addressing functions for multiple virtual address spaces. The access registers represent the full addressing capability of the system but do not directly contain the addressing information. The system has a plurality of general purpose registers, a plurality of access registers associated with the general registers, an access list having access list entries which is addressed by the contents of the access register, memory storage for holding address space number second table entries (ASTE), where the contents of the access list entry locate the ASTE and where the ASTE contains the addressing information needed to locate a virtual address when combined with the contents of a general register, Access register translation (ART) consists of the process of determining addressing information by using the access list entry and the ASTE. The system has available to it at any one time a selection of one of two domains each represented by an access list. One domain is related to the dispatchable unit task to be performed and the other is related to the address space in which a particular program operates. The ART process selects the domain which the access register is using.

    ARRANGEMENT FOR PROTECTING DATA IN A COMPUTER SYSTEM MEMORY MODULE AGAINST UNAUTHORISED ACCESS
    7.
    发明专利
    ARRANGEMENT FOR PROTECTING DATA IN A COMPUTER SYSTEM MEMORY MODULE AGAINST UNAUTHORISED ACCESS 未知

    公开(公告)号：PL170547B1

    公开(公告)日：1996-12-31

    申请号：PL30081092

    申请日：1992-04-29

    Applicant: IBM

    Inventor： CLARK CARL E ,  MALL MICHAEL G ,  SCALZI CASPER A ,  SINHA BHASKAR

    IPC: G06F12/14 ,  G06F21/24

    Abstract: Provides three access levels of storage key protection, comprising a supervisory level (key 0), an intermediate level of non-public and non-supervisory keys (keys 1-8, 10-15), and an unique public level (key 9). The program routines operating with a supervisory-level access key can access both the public level and the intermediate level of storage blocks. Although a program routine operating with an access key in the intermediary access level cannot access any supervisory level storage block, it can access any block assigned a public level storage key, as well as any storage block assigned the respective intermediate level key. One or more third-level public storage keys (PSKs) may be provided. A program access key using one of the PSK values can only access blocks having the same PSK value, and it cannot access blocks having any other key value.

    STORAGE PROTECTION UTILIZING PUBLIC KEY CONTROL
    8.
    发明专利
    STORAGE PROTECTION UTILIZING PUBLIC KEY CONTROL 未知

    公开(公告)号：CA2064640C

    公开(公告)日：1995-12-12

    申请号：CA2064640

    申请日：1992-04-01

    Applicant: IBM

    Inventor： CLARK CARL E ,  MALL MICHAEL G ,  SCALZI CASPER A ,  SINHA BHASKAR

    IPC: G06F12/14 ,  G06F21/24 ,  G06F13/16

    Abstract: Provides three access levels of storage key protection, comprising a supervisory level (key 0), an intermediate level of non-public and non-supervisory keys (keys 1-8, 10-15), and a unique public level (key 9). The program routines operating with a supervisory-level access key can access both the public level and the intermediate level of storage blocks. Although a program routine operating with an access key in the intermediate access level cannot access any supervisory level storage block, it can access any block assigned a public level storage key, as well as any storage block assigned the respective intermediate level key. One or more third-level public storage keys (PSKs) may be provided. A program access key using one of the PSK values can only access blocks having the same PSK value, and it cannot access blocks having any other key value.

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