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    THIN-FILM TRANSISTOR, METHOD FOR MANUFACTURING THIN-FILM TRANSISTOR AND THE THIN-FILM TRANSISTOR DEVICE
    2.
    发明专利
    THIN-FILM TRANSISTOR, METHOD FOR MANUFACTURING THIN-FILM TRANSISTOR AND THE THIN-FILM TRANSISTOR DEVICE 失效

    公开(公告)号：JP2002237594A

    公开(公告)日：2002-08-23

    申请号：JP2001027029

    申请日：2001-02-02

    Applicant: IBM

    Inventor： TSUJIMURA TAKATOSHI ,  HASUMI TARO ,  TOKUHIRO OSAMU ,  MOROOKA MITSUO

    IPC: G02F1/1368 ,  H01L21/28 ,  H01L21/306 ,  H01L21/336 ,  H01L21/768 ,  H01L29/786

    Abstract: PROBLEM TO BE SOLVED: To provide a thin-film transistor using a interlayer polymer resin, in which the self-alignment of contact holes are improved and the number of manufacturing steps can be reduced, and to provide a method for manufacturing the same and a display device including the thin-film transistor. SOLUTION: The thin-film semiconductor device includes a gate electrode 21, a gate insulating film 22, a semiconductor layer 23, a channel protective film 24, a source and a drain electrodes 25 and 26 respectively, a passivation layer 27 on which a first opening is formed to form a contact hole 28, and a interlayer insulating film 31 which extends along the layer 27 and has a second opening formed thereon to form the contact hole 28. The first and second openings are self-aligned to each other over a substrate 20. Conductive layers 32 and 33 are deposited on the inner wall of the contact hole 28, and the inner wall is formed by a plurality of different etching processes.

    ACTIVE MATRIX SUBSTRATE, DISPLAY DEVICE, AND METHOD OF MANUFACTURING ACTIVE MATRIX SUBSTRATE
    5.
    发明专利
    ACTIVE MATRIX SUBSTRATE, DISPLAY DEVICE, AND METHOD OF MANUFACTURING ACTIVE MATRIX SUBSTRATE 失效

    公开(公告)号：JP2002043575A

    公开(公告)日：2002-02-08

    申请号：JP2000208593

    申请日：2000-07-10

    Applicant: IBM

    Inventor： TSUJIMURA TAKATOSHI ,  TOKUHIRO OSAMU ,  MIWA KOICHI ,  MOROOKA MITSUO

    IPC: G02F1/1333 ,  G02F1/136 ,  G02F1/1368 ,  G09F9/00 ,  G09F9/30 ,  H01L21/3213 ,  H01L21/336 ,  H01L29/786

    Abstract: PROBLEM TO BE SOLVED: To improve the reliability of an active matrix substrate by preventing the corrosion, etc., of lead-out wiring by covering the wiring with a gate insulating film or ITO without adding any patterning process and, in addition, improving the manufacturing yield of the substrate. SOLUTION: This active matrix substrate is provided with a source electrode 14 and a drain electrode 15 which are arranged above an insulating substrate 11 with a prescribed clearance in between; an a-Si film 17, a gate insulating film 18, and a gate electrode 19 successively laminated upon the electrodes 14 and 15; and an ITO 20 having a first portion which is laminated upon the gate electrode 19 and has the same patterned surface as the electrode 19 has and a second portion which is formed to partially cover the source electrode 14 and forms a picture element electrode. The substrate is also provided with a data line 16 which is connected to the drain electrode 15 and covered with another gate insulating film 18.

    METHOD AND DEVICE FOR MANUFACTURING ACTIVE MATRIX DEVICE INCLUDING TOP-GATE-TYPE TFT
    6.
    发明专利
    METHOD AND DEVICE FOR MANUFACTURING ACTIVE MATRIX DEVICE INCLUDING TOP-GATE-TYPE TFT 失效

    公开(公告)号：JP2001338880A

    公开(公告)日：2001-12-07

    申请号：JP2000156007

    申请日：2000-05-26

    Applicant: IBM

    Inventor： TSUJIMURA TAKATOSHI ,  TOKUHIRO OSAMU ,  MOROOKA MITSUO ,  MIYAMOTO TAKASHI

    IPC: G02F1/136 ,  C23C16/44 ,  G02F1/1368 ,  G09F9/00 ,  H01L21/00 ,  H01L21/205 ,  H01L21/336 ,  H01L27/12 ,  H01L29/786

    Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method and device that can improve productivity, and can reduce costs for manufacturing an active matrix device including a top-gate-type TFT without poorly affecting the characteristics of the TFT. SOLUTION: This method includes a process that forms oxide coating 15 on the internal wall of a treatment chamber 9 for CVD in the manufacture of the top-gate-type TFT, a process that arranges a substrate 1 where source and drain electrodes 5 and 4 are formed in the treatment chamber 9, a process that carries out P doping to the source and drain electrodes 5 and 4, and a process that forms an a-Si layer 6 and a gate insulating film 7 in the treatment chamber. Also, this device manufactures the active matrix device including the top-gage-type TFT where the inner surface of the treatment chamber 9 is coated with the oxide coating 15.

    Thin film transistor, its manufacturing method, and active matrix display comprising thin film transistor
    8.
    发明专利
    Thin film transistor, its manufacturing method, and active matrix display comprising thin film transistor 有权
    薄膜晶体管及其制造方法和包含薄膜晶体管的主动矩阵显示

    公开(公告)号：JP2003303969A

    公开(公告)日：2003-10-24

    申请号：JP2002098466

    申请日：2002-04-01

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーション

    Inventor： TSUJIMURA TAKATOSHI ,  KOBAYASHI KAZUMASA ,  MOROOKA MITSUO ,  MIWA KOICHI

    IPC: G02F1/1368 ,  H01L29/786

    Abstract: PROBLEM TO BE SOLVED: To provide a thin film transistor having a high mobility in which aging of the threshold value is improved, its fabricating method, and an active matrix display comprising the thin film transistor. SOLUTION: The thin film transistor comprises an insulating film 12 formed on a substrate 10, semiconductor layers 16a and 16b formed on an insulating film 14, a gate electrode 18, a source electrode 20 connected with the semiconductor layers, and a drain electrode 22 wherein the semiconductor layers 16a and 16b are formed such that electronic affinity decreases as they approach the insulating film 14 along the thickness direction thereof. COPYRIGHT: (C)2004,JPO

    Abstract translation: 要解决的问题：提供具有提高阈值老化的高迁移率的薄膜晶体管，其制造方法和包括薄膜晶体管的有源矩阵显示器。 解决方案：薄膜晶体管包括形成在基板10上的绝缘膜12，形成在绝缘膜14上的半导体层16a和16b，栅电极18，与半导体层连接的源极20和漏极 电极22，其中半导体层16a和16b形成为使得当电子亲和力沿着其厚度方向接近绝缘膜14时，电子亲和力降低。 版权所有（C）2004，JPO

    Organic led device and its manufacturing method
    9.
    发明专利
    Organic led device and its manufacturing method 有权
    有机LED器件及其制造方法

    公开(公告)号：JP2003295792A

    公开(公告)日：2003-10-15

    申请号：JP2002150386

    申请日：2002-05-24

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーション

    Inventor： TSUJIMURA TAKATOSHI ,  TANAKA ATSUSHI ,  MIWA KOICHI ,  MOROOKA MITSUO

    IPC: H05B33/10 ,  G09F9/30 ,  G09G3/14 ,  H01L21/336 ,  H01L27/15 ,  H01L27/32 ,  H01L29/786 ,  H01L51/50 ,  H05B33/12 ,  H05B33/14 ,  H05B33/22

    CPC classification number: H01L27/3244

    Abstract: PROBLEM TO BE SOLVED: To provide an organic LED device which can cope with a large area, and to provide its efficient manufacturing method. SOLUTION: This organic LED device 10 is constituted on an insulation substrate 26 and includes switching TFT 12 and a driver TFT 14 formed on the substrate 26. Further, an organic LED element 16 is formed for every pixel through an insulation film 58 on the substrate 26, and connected to the driver TFT. This organic LED device 10 comprises an anode 34 and a cathode 36 connecting the driver TFT 12 and the organic LED element 16 formed on the upper side of the insulation film 58, the anode 34 connects a plurality of pixels as a common electrode and self-aligning property at the time of manufacturing is improved. COPYRIGHT: (C)2004,JPO

    Abstract translation: 要解决的问题：提供一种能够应对大面积的有机LED装置，并提供其有效的制造方法。 解决方案：该有机LED器件10构成在绝缘基板26上，并且包括形成在基板26上的开关TFT 12和驱动TFT 14.此外，通过绝缘膜58形成每个像素的有机LED元件16 并且连接到驱动器TFT。 该有机LED器件10包括连接驱动TFT12和形成在绝缘膜58的上侧的有机LED元件16的阳极34和阴极36，阳极34连接作为公共电极的多个像素， 提高了制造时的对准性。 版权所有（C）2004，JPO

    THIN-FILM TRANSISTOR AND MANUFACTURING METHOD THEREFOR
    10.
    发明专利
    THIN-FILM TRANSISTOR AND MANUFACTURING METHOD THEREFOR 失效

    公开(公告)号：JP2001196591A

    公开(公告)日：2001-07-19

    申请号：JP2000004301

    申请日：2000-01-13

    Applicant: IBM

    Inventor： TSUJIMURA TAKATOSHI ,  TOKUHIRO OSAMU ,  MOROOKA MITSUO ,  MIYAMOTO TAKASHI

    IPC: G02F1/136 ,  G02F1/1368 ,  H01L21/336 ,  H01L29/786

    Abstract: PROBLEM TO BE SOLVED: To reduce leakage current at a floating island formed on a thin-film transistor. SOLUTION: A source electrode 14 and a drain electrode 15, provided above an insulating substrate 11 at a prescribed interval, an a-Si film 16 provided to them, a gate insulating film 17 stacked on the a-Si film 16, and a gate electrode 18 stacked on the gate insulating film 17, are provided. The a-Si film 16 comprises a floating inland 20, which is not present above and below the gate electrode 18, while being present between the source electrode 14 and the drain electrode 15. The boron ion is implanted in the region, to form a boron ion implantation region 19.

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