Audio amplifier and notebook-sized personal computer
    1.
    发明专利
    Audio amplifier and notebook-sized personal computer 有权
    音频放大器和笔记本大小的个人计算机

    公开(公告)号:JP2003304124A

    公开(公告)日:2003-10-24

    申请号:JP2002096550

    申请日:2002-03-29

    Abstract: PROBLEM TO BE SOLVED: To reduce the capacity of a large capacity capacitor interposed between an amplifier and an output connector in an audio amplifier to which a plurality of kinds of audio apparatuses are connectable through one output connector.
    SOLUTION: This device is provided with an amplifier 15, an output connector 23, a capacitor 17, an impedance discriminating means 33 for judging whether or not the impedance of an external load connected to the output connector 23 is not more than a prescribed value, a switch 19 for short-circuiting the both edges of the capacitor 17 when the impedance of the external load is not more than the prescribed value, and means (29, 31) for applying a DC bias voltage to the return side of the output connector 23 when the impedance of the external load is not more than the prescribed value.
    COPYRIGHT: (C)2004,JPO

    Abstract translation: 解决的问题:为了降低放大器与音频放大器中的输出连接器之间的大容量电容器的容量,多个音频装置可以通过一个输出连接器连接到音频放大器。 解决方案:该装置设置有放大器15,输出连接器23,电容器17,阻抗鉴别装置33,用于判断连接到输出连接器23的外部负载的阻抗是否不大于 当外部负载的阻抗不大于规定值时,用于使电容器17的两个边缘短路的开关19以及用于将直流偏置电压施加到回路侧的装置(29,31) 当外部负载的阻抗不大于规定值时,输出连接器23。 版权所有(C)2004,JPO

    AC ADAPTOR, POWER SUPPLY UNIT, ELECTRICAL APPARATUS, AND CONTROLLING METHOD FOR POWER SUPPLY UNIT

    公开(公告)号:JP2002247847A

    公开(公告)日:2002-08-30

    申请号:JP2001044204

    申请日:2001-02-20

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To reduce power loss by reducing the operating frequency of a power supply unit on standby, for example, in soft-off or suspended state or when a line has not been connected. SOLUTION: An AC adaptor 10 is installed so that the adaptor is connectable to equipment main body through a power line, and is provided with a rectification bridge diode 11 for rectifying inputted alternating-current voltage; a capacitor 12 for smoothing the voltage; a switching transistor 13 that performs switching of the rectified and smoothed voltage; and a pulse width modulation IC 15 that provides an operating frequency for the performed switching. The pulse width modulation IC 15 provides a first operating frequency to the switching transistor 13 when the equipment main body performs normal operation, and a second operating frequency lower than the first operating frequency to the switching transistor 13 when the power line between the adaptor and the equipment main body is disconnected or when the equipment main body is in a specified standby state.

    DETECTION CIRCUIT FOR MICROPHONE PLUG AND LINE PLUG, COMMON USE CIRCUIT FOR JACK, ADAPTOR USING THE JACK IN COMMON, AND NOTEBOOK PC PROVIDED WITH THE COMMON USE JACK

    公开(公告)号:JP2003143687A

    公开(公告)日:2003-05-16

    申请号:JP2001320890

    申请日:2001-10-18

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide a detection circuit for microphone plug and line plug that can use a microphone jack and a line jack in common, a common use circuit for the jack, an adaptor using the jack in common, and a notebook PC provided with the common use jack. SOLUTION: While a plug of an external device to be connected is plugged into a jack and connected, a difference of impedance between a ring pin and a tip pin of the jack is obtained, whether the jack to which the external device is connected is a microphone or a line jack is detected on the basis of the difference of impedance to be obtained. In the case of the microphone jack, it is controlled so that a DC bias is applied to the ring pin or the tip pin of the jack, and in the case of the line jack, no DC bias is given to the ring pin and the tip pin of the jack, or in the case of a device using the line jack, the device is connected to the common use jack via an adaptor with a prescribed DC cut function.

    SYNCHRONOUS SIGNAL SEPARATION CIRCUIT

    公开(公告)号:JPH0898055A

    公开(公告)日:1996-04-12

    申请号:JP22783894

    申请日:1994-09-22

    Applicant: IBM

    Abstract: PURPOSE: To avoid errors due to jitters, delays or the like in separating and taking out synchronizing signals from image signals to which synchronizing signals are added. CONSTITUTION: Sync-on-green signals are taken out from a branch line 56 branched on the way of a signal line 54 which connects an output terminal of a video amplifier 36 to an A/D converter 42, and are connected to an input terminal on the positive side of a comparator 58. It means that a voltage that is amplified by the video amplifier 36 and corresponds to luminance signal shifted by an offset voltage is inputted in an input terminal on the positive side of the comparator 58. On the other hand, to an input terminal on the negative side of the comparator 58 is inputted a threshold voltage for detecting falls of the above-mentioned synchronous signals. When a voltage corresponding to image signals becomes lower than the threshold voltage, the comparator 58 judges that synchronizing signals are detected and outputs a low level (L) signal.

    DOT-CLOCK FORMATION DEVICE FOR LIQUID CRYSTAL DISPLAY

    公开(公告)号:JPH07110667A

    公开(公告)日:1995-04-25

    申请号:JP24509893

    申请日:1993-09-30

    Applicant: IBM

    Abstract: PURPOSE: To generate the dot clock of a liquid crystal display device from a horizontal synchronizing signal with little skew. CONSTITUTION: The function of PSS is divided into three. One of them is means 29, 36 and 34 for obtaining a specific frequency. These means supply voltage to VCO 30 from DAC(digital-analog converter) 29 of a latch type. The horizontal synchronizing signal is inversely calculated from a finally generated dot clock to increase/reduce the value of DAC 29 based on an error between this calculated horizontal synchronizing signal and an actual horizontal synchronizing signal. Correction by this increase/reduction is executed with the timing of vertical synchronization, e.g. The second one of the function is a synchronizing means 34 which adds a signal corresponding to an error between the actual horizontal synchronizing signal and the phase with a dot clock to a signal from DAC 29 to control the phase of the dot clock. Third one is PLL means 31 and 32 generating the dot clock based on the signal of the prescribed frequency.

Patent Agency Ranking