公开(公告)号：DE3851038D1

公开(公告)日：1994-09-15

申请号：DE3851038

申请日：1988-10-20

Applicant: IBM

Inventor： CHANG ALBERT ,  COCKE JOHN ,  MERGEN MARK FREDERICK ,  OEHLER RICHARD RAPHAEL

IPC: G06F12/00 ,  G06F12/14

Abstract: A method of and a controller for accessing a protected memory which is logically divided into major partitions - pages - which are in turn sub-divided into minor partitions - blocks - by concurrently executing transactions, using virtual block addressing and address translation at the memory controller via an access table, wherein there are provided table entries containing priviledged access control fields relating to the pages and lock fields relating to the individual blocks, by receiving an address of a data block to be accessed by an identifiable transaction; deriving from the address an access table entry corresponding to the data block and testing the data in the page access control field and the lock field governing access to the block; and providing the requested access if permitted by the access control data and the lock data for the type of access concerned, and also providing recorded access, if not permitted but not specifically denied by the lock data, using at least part of the lock field to record such latter type of access.

公开(公告)号：CA2107056C

公开(公告)日：1998-06-23

申请号：CA2107056

申请日：1993-09-27

Applicant: IBM

Inventor： OEHLER RICHARD RAPHAEL ,  KAHLE JAMES ALLAN ,  MUHICH JOHN STEPHEN ,  SILHA EDWARD JOHN

IPC: G06F15/16 ,  G06F12/10 ,  G06F15/177

Abstract: A method and system are disclosed for increasing memory concurrency in a multiprocessor computer system which includes system memory, multiple processors coupled together via a bus, each of the processors including multiple processor units for executing multiple instructions and for performing read, write and store operations and an associated Translation Lookaside Buffer (TLB) for translating effective addresses into real memory addresses within the system memory. Multiple page table entries are provided within a page table within the system memory which each include multiple individually accessible fields, an effective address and an associated real memory address for a selected system memory location. A reference bit is provided within a first individually accessible 5 in associated system memory location has been accessed for a read or write operation. A change bit is provided within a second individually accessible field within each page table entry and this change bit is utilized to indicate if an associated system memory location has been modified by a write operation. By storing the reference bit and change bit in separate including accessible fields the reference bit and change bit may be concurrently updated by multiple processors, increasing memory concurrency.

公开(公告)号：DE69027868T2

公开(公告)日：1997-02-06

申请号：DE69027868

申请日：1990-01-10

Applicant: IBM

Inventor： MATHIS JOSEPH RICHARD ,  OEHLER RICHARD RAPHAEL ,  ZEITLER CARL

IPC: G06F13/12

Abstract: The invention relates to a data processing system comprising a processor means (2) for issuing communications commands on a first communications channel (4), a peripheral means (5, 6, 7) connected to the first communications channel and to a second communications channel (8) operating asynchronously, for performing operations specified by commands from the processor means and for responding to communications on the second communications channel, and status indicating means for indicating to the processor means the status of the peripheral means. According to the invention the data processing system is characterised in that the status indicating means comprises control means for providing a status word to the processor means in response to a command issued to the peripheral means by the processor means, the status word indicating the status of the peripheral means at a time when the peripheral means initiates an operation specified by the issued command.

公开(公告)号：DE69027868D1

公开(公告)日：1996-08-29

申请号：DE69027868

申请日：1990-01-10

Applicant: IBM

Inventor： MATHIS JOSEPH RICHARD ,  OEHLER RICHARD RAPHAEL ,  ZEITLER CARL

IPC: G06F13/12

Abstract: The invention relates to a data processing system comprising a processor means (2) for issuing communications commands on a first communications channel (4), a peripheral means (5, 6, 7) connected to the first communications channel and to a second communications channel (8) operating asynchronously, for performing operations specified by commands from the processor means and for responding to communications on the second communications channel, and status indicating means for indicating to the processor means the status of the peripheral means. According to the invention the data processing system is characterised in that the status indicating means comprises control means for providing a status word to the processor means in response to a command issued to the peripheral means by the processor means, the status word indicating the status of the peripheral means at a time when the peripheral means initiates an operation specified by the issued command.

公开(公告)号：DE3851038T2

公开(公告)日：1995-03-09

申请号：DE3851038

申请日：1988-10-20

Applicant: IBM

Inventor： CHANG ALBERT ,  COCKE JOHN ,  MERGEN MARK FREDERICK ,  OEHLER RICHARD RAPHAEL

IPC: G06F12/00 ,  G06F12/14

Abstract: A method of and a controller for accessing a protected memory which is logically divided into major partitions - pages - which are in turn sub-divided into minor partitions - blocks - by concurrently executing transactions, using virtual block addressing and address translation at the memory controller via an access table, wherein there are provided table entries containing priviledged access control fields relating to the pages and lock fields relating to the individual blocks, by receiving an address of a data block to be accessed by an identifiable transaction; deriving from the address an access table entry corresponding to the data block and testing the data in the page access control field and the lock field governing access to the block; and providing the requested access if permitted by the access control data and the lock data for the type of access concerned, and also providing recorded access, if not permitted but not specifically denied by the lock data, using at least part of the lock field to record such latter type of access.