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1.发明授权BISTABLE RESISTOR OF EUROPIUM OXIDE, EUROPIUM SULFIDE, OR EUROPIUM SELENIUM DOPED WITH THREE d TRANSITION OR VA ELEMENT 失效欧洲氧化物，欧洲硫酸盐或欧洲三氧化二铁的耐腐蚀剂，具有三次过渡或VA元素
公开(公告)号：US3656029A
公开(公告)日：1972-04-11
申请号：US3656029D
申请日：1970-12-31
Applicant: IBM
Inventor： AHN KIE Y , PARK KYU C
CPC classification number: H01L45/04 , H01L45/145 , Y10S438/90
Abstract: This disclosure provides a bistable resistor and materials therefor. The bistable resistor has base electrode, intermediate layer and counter electrode. Illustratively, intermediate layer includes a rare earth chalcogenide, e.g., EuO or EuS, doped with a percentage by weight of either a group VA element, e.g., Bi, or a first row transition element, e.g., Cr. Further, the practice of the invention includes having the host intermediate layer comprised of a combination of a plurality of different rare earth chalcogenides, and having a dopant configuration which includes a combination of a plurality of the individually suitable dopants.
Abstract translation: 本公开提供了双稳态电阻器及其材料。 双稳电阻器具有基极，中间层和对电极。 示例性地，中间层包括稀土族硫族化物，例如掺杂有VA族元素例如Bi或第一行过渡元素例如Cr的重量百分比的EuO或EuS。 此外，本发明的实践包括使主体中间层由多种不同的稀土硫族化物的组合组成，并且具有包括多个单独合适的掺杂剂的组合的掺杂剂构型。
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公开(公告)号：FR2317758A1
公开(公告)日：1977-02-04
申请号：FR7618339
申请日：1976-06-09
Applicant: IBM
Inventor： BERKENBLIT MELVIN , LUSSOW ROBERT O , PARK KYU C , REISMAN ARNOLD
Abstract: An in situ process is disclosed for fabricating gas discharge display panels in a sequential seal, bake-out and backfill mode of operation. The single thermal cycle process involves placing unassembled panel parts in a controlled gas ambient furnace system with required seal frame, evacuating said furnace and backfilling with an appropriate ambient atmosphere to an appropriate pressure while heating the furnace. During the heating, the furnace is repeatedly evacuated to moderate vacuum and refilled to some predetermined pressure. The furnace is heated to just above the glass transition temperature of the seal frame in this evacuate-refill mode, then held for some time to achieve outgassing of both panel parts and furnace chamber. Thereafter, the furnace chamber is refilled to one atmosphere and further heated to complete the sealing of the panel. The panel is then cooled to approximately 300 DEG C, still under one atmosphere, after which the evacuate-refill cycle is continuously repeated as the temperature is lowered down to the temperature of tip-off using the refill gas for the pressurization. The panel is refilled to an appropriate pressure at elevated temperature such that at room temperature the pressure is the desired pressure and the panel is tipped off. The process of successive evacuations and backfillings at the appropriate portions of the cycle are highly desirable for cleaning of the panel parts via contaminant dilution.
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公开(公告)号：CA1088991A
公开(公告)日：1980-11-04
申请号：CA290763
申请日：1977-11-14
Applicant: IBM
Inventor： PARK KYU C , REISMAN ARNOLD
Abstract: IMPROVED DSDT TARGET AND METHOD FOR FABRICATING THE SAME A process for the fabrication of a deformographic storage display tube (DSDT) target in which a wafer of silicon or other etchable material is used (1) as a temporary support during the generation of the active region of the target and (2) as a supporting structure for the completed target. The DSDT target structure comprises a reflection layer on a dielectric layer supported in turn on a silicon or other etchable material wafer, the wafer being etched off at its back side to expose the dielectric layer while providing an outer frame support structure made of the wafer around the edge, with the dielectric layer being etched to form pillars of the dielectric on the backside of the reflection layer, whereby the dielectric pillars enable a deformation action to occur in the region between the pillars. An inner frame support structure comprised of a similarly etched wafer, a dielectric layer and a secondary electron emission layer is fitted against the bottoms of the pillars and bonded to the outer frame support structure, thereby forming the completed target.
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公开(公告)号：CA1051507A
公开(公告)日：1979-03-27
申请号：CA255965
申请日：1976-06-29
Applicant: IBM
Inventor： BERKENBLIT MELVIN , LUSSOW ROBERT O , PARK KYU C , REISMAN ARNOLD
Abstract: GAS DISCHARGE DISPLAY PANEL FABRICATION An in situ process is disclosed for fabricating gas discharge display panels in a sequential seal, bake-out and backfill mode of operation. The single thermal cycle process involves placing unassembled panel parts in a controlled gas ambient furnace system with required seal frame, evacuating said furnace and backfilling with an appropriate ambient atmosphere to an appropriate pressure while heating the furnace. During the heating, the furnace is repeatedly evacuated to moderate vacuum and refilled to some predetermined pressure. The furnace is heated to just above the glass transition temperature of the seal frame in this evacuate-refill mode, then held for some time to achieve outgassing of both panel parts and furnace chamber. Thereafter, the furnace chamber is refilled to one atmosphere and further heated to complete the sealing of the panel. The panel is then cooled to approximately 300.degree.C, still under one atmosphere, after which the evacuate-refill cycle is continuously repeated as the temperature is lowered down to the temperature of tip-off using the refill gas for the pressurization. The panel is refilled to an appropriate pressure at elevated temperature such that at room temperature the pressure is the desired pressure and the panel is tipped off. The process of successive evacuations and backfillings at the appropriate portions of the cycle are highly desirable for cleaning of the panel parts via contaminant dilution.
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Patent Agency Ranking
公开(公告)号：CA1086374A
公开(公告)日：1980-09-23
申请号：CA287577
申请日：1977-09-27
Applicant: IBM
Inventor： ABOELFOTOH M OSAMA , PARK KYU C
Abstract: IMPROVED GAS PANEL ASSEMBLY A method is disclosed for the fabrication of a gas panel assembly with improved static and dynamic operating margins which includes depositing arrays of parallel lines as electrical conductors on a pair of glass plates, providing a dielectric layer over the parallel lines, baking out the respective glass plates in vacuum to eliminate residual gasses or impurities, depositing a layer of refractory electron emissive material over the dielectric of the glass plate assemblies at a prescribed elevated temperature range, and spacing the glass plates a specified distance apart with their arrays substantially orthogonal. The assembly is subsequently fired in an oven to seal the glass plates about their periphery while providing a chamber therebetween, evacuating the chamber, filling it with an illuminable gas, exposing the parallel lines at one end of each glass plate for electrical contact and testing the electrical characteristics of the panel after fabrication.
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公开(公告)号：DE2750505A1
公开(公告)日：1978-06-22
申请号：DE2750505
申请日：1977-11-11
Applicant: IBM
Inventor： PARK KYU C , REISMAN ARNOLD
Abstract: A process for the fabrication of a deformographic storage display tube (DSDT) target in which a wafer of silicon or other etchable material is used (1) as a temporary support during the generation of the active region of the target and (2) as a supporting structure for the completed target. The DSDT target structure comprises a reflection layer on a dielectric layer supported in turn on a silicon or other etchable material wafer, the wafer being etched off at its back side to expose the dielectric layer while providing an outer frame support structure made of the wafer around the edge, with the dielectric layer being etched to form pillars of the dielectric on the backside of the reflection layer, whereby the dielectric pillars enable a deformation action to occur in the region between the pillars. An inner frame support structure comprised of a similarly etched wafer, a dielectric layer and a secondary electron emission layer is fitted against the bottoms of the pillars and bonded to the outer frame support structure, thereby forming the completed target.
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公开(公告)号：CA1100563A
公开(公告)日：1981-05-05
申请号：CA299196
申请日：1978-03-17
Applicant: IBM
Inventor： AHEARN WILLIAM E , PARK KYU C
Abstract: MULTICOLOR GAS DISCHARGE DISPLAY MEMORY PANEL Gas display panel performance with improved resolution, color, memory margin and brightness is provided as a result of helium based mixtures in a panel structure using evaporated glass technology, e.g., borosilicate glass technology. Multicolor emissions are achieved directly from the helium based mixtures, and additional color enhancement and selection is accomplished by varying the gas parameters of pressure and dopant concentration and the sustain voltage waveform drive conditions. Color selection from the helium based mixtures with molecular dopants is made using an optical filter or a colored glass substrate. A gas panel is obtained that emits white light using a helium based mixture doped with oxygen. It is a Penning mixture with optical radiation in the visible part of the spectrum due to systems of emission bands from the ionized oxygen molecules. The first negative system exhibits four strong bands that vary from 75 to 125.ANG. in width and account for green, yellow and red colors. In addition, four weaker bands are observed for the second negative system which account for the blue color.
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公开(公告)号：FR2374735A1
公开(公告)日：1978-07-13
申请号：FR7733123
申请日：1977-10-27
Applicant: IBM
Inventor： PARK KYU C , REISMAN ARNOLD
Abstract: A process for the fabrication of a deformographic storage display tube (DSDT) target in which a wafer of silicon or other etchable material is used (1) as a temporary support during the generation of the active region of the target and (2) as a supporting structure for the completed target. The DSDT target structure comprises a reflection layer on a dielectric layer supported in turn on a silicon or other etchable material wafer, the wafer being etched off at its back side to expose the dielectric layer while providing an outer frame support structure made of the wafer around the edge, with the dielectric layer being etched to form pillars of the dielectric on the backside of the reflection layer, whereby the dielectric pillars enable a deformation action to occur in the region between the pillars. An inner frame support structure comprised of a similarly etched wafer, a dielectric layer and a secondary electron emission layer is fitted against the bottoms of the pillars and bonded to the outer frame support structure, thereby forming the completed target.
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公开(公告)号：FR2369677A1
公开(公告)日：1978-05-26
申请号：FR7727687
申请日：1977-09-09
Applicant: IBM
Inventor： ABOELFOTOH OSAMA , PARK KYU C
Abstract: A method is disclosed for the fabrication of a gas panel assembly with improved static and dynamic operating margins which includes depositing arrays of parallel lines as electrical conductors on a pair of glass plates, providing a dielectric layer over the parallel lines, baking out the respective glass plates in vacuum to eliminate residual gasses or impurities, depositing a layer of electron emissive refactory material over the dielectric of the glass plate assemblies at a prescribed elevated temperature range, and spacing the glass plates a specified distance apart with their arrays substantially orthogonal. This assembly is subsequently fired in an oven to seal the glass plates about their periphery while providing a chamber therebetween, the chamber evacuated and filled with an illuminable gas, the parallel lines at one end of each glass plate exposed for electrical contact and the electrical characteristics of the panel tested after fabrication.
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