公开(公告)号：EP1842235A4

公开(公告)日：2009-03-25

申请号：EP05854758

申请日：2005-12-21

Applicant: IBM

Inventor： ELLIS-MONAGHAN JOHN J ,  MARTIN DALE W ,  MURPHY WILLIAM J ,  NAKOS JAMES S ,  PETERSON KIRK

IPC: H01L21/8238 ,  H01L21/336 ,  H01L29/772 ,  H01L29/78

CPC classification number: H01L29/7845 ,  H01L21/28052 ,  H01L21/823814 ,  H01L21/823835 ,  H01L29/4933 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833

Abstract: A semiconducting structure and a method of forming thereof, includes a substrate having a p-type device region (20) and a n-type device region (10); a first-type silicide contact (30) to the n-type device region (10); the first-type silicide having a work function that is substantially aligned to the n-type device region conduction band; and a second-type silicide contact (35) to the p-type device region (20); the second-type silicide having a work function that is substantially aligned to the p-type device region valence band. The present invention also provides a semiconducting structure and a method of forming therefore, in which the silicide contact material and silicide contact processing conditions are selected to provide strain based device improvements in pFET and nFET devices.