公开(公告)号：US3925107A

公开(公告)日：1975-12-09

申请号：US52279474

申请日：1974-11-11

Applicant: IBM

Inventor： GDULA ROBERT A ,  RAIDER STANLEY I ,  REVITZ MARTIN

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/316 ,  H01L21/336 ,  H01L29/00 ,  H01L21/324

CPC classification number: H01L21/28 ,  H01L29/00 ,  Y10S438/91

Abstract: The fixed charge in an SiO2 dielectric layer for an MOS device is reduced by annealing the device after the SiO2 gate dielectric layer has been formed by thermal oxidation to a thickness less than 500 Angstroms wherein the annealing is accomplished in an argon or other Group VIII gas atmosphere at a temperature of at least 900*C for at least ten minutes.

公开(公告)号：FR2325196A1

公开(公告)日：1977-04-15

申请号：FR7623078

申请日：1976-07-20

Applicant: IBM

Inventor： GLANG REINHARD ,  RAIDER STANLEY I

IPC: H01L29/73 ,  H01L21/22 ,  H01L21/283 ,  H01L21/3115 ,  H01L21/331 ,  H01L21/76 ,  H01L21/768 ,  H01L23/522 ,  H01L29/06 ,  H01L29/78 ,  H01L29/36 ,  H01L21/322

Abstract: Surface leakage paths on bipolar and FET transistors may be significantly reduced by the presence of a fixed charge in an insulating layer adhered to a semiconductor wafer. The fixed charge consists of ions which are introduced into the insulating layer after all high-temperature process treatments have been performed on the wafer. The ions are introduced into the insulating layer by (1) immersing the wafer in a solution of a suitable metal salt; (2) sandwiching the wafers between carefully cleaned non-immersed wafers and (3) driving the ions to the insulating layer-wafer interface by heating the wafer stacks in a furnace at a preselected temperature. The effective charge level embedded in the insulating layer is sufficient to protect against inversion of the wafer surface due to conductors on the insulating layer having negative potentials exceeding 10 volts and overlying the stored-charge area.

公开(公告)号：FR2290757A1

公开(公告)日：1976-06-04

申请号：FR7529327

申请日：1975-09-19

Applicant: IBM

Inventor： GOULA ROBERT A ,  RAIDER STANLEY I ,  REVITZ MARTIN

IPC: H01L21/28 ,  H01L21/3105 ,  H01L21/18 ,  H01L29/78

Abstract: Method of mfr. and stabilisation of a gate dielectric layer in MOS devices in order to reduce the fixed oxide charge in the gate duelectric layer without degrading the characteristic of the layer comprises forming a layer of >=1 SiO2, layer 500A thick on >=1 region of the gate by thermal oxidation of the monocrystalline silicon substrate and reheating the substrate in an atmosphere of He, Ne, Ar, Kr, or Xe, at 900 degrees C for >=10 mins. The gate dielectric layer is 100-300 A thick. The substrate is heated at 900-1100 degrees C for 9 mins to 100 hrs. pref. at 950-1050 degrees C for 15 mins to 24 hrs. in argon. The heat treatment in inert gas reduces the state of charge of the surface while N2 does not.