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    CONTROLLING EXECUTION OF THREADS IN A MULTI-THREADED PROCESSOR
    2.
    发明专利
    CONTROLLING EXECUTION OF THREADS IN A MULTI-THREADED PROCESSOR 未知

    公开(公告)号：CA2961705A1

    公开(公告)日：2016-05-06

    申请号：CA2961705

    申请日：2015-10-21

    Applicant: IBM

    Inventor： SLEGEL TIMOTHY ,  ALEXANDER KHARY JASON ,  BUSABA FADI YUSUF ,  FARRELL MARK ,  RELL JOHN GILBERT JR

    IPC: G06F9/46 ,  G06F9/38 ,  G06F9/48

    Abstract: Execution of threads in a processor core is controlled. The processor core supports simultaneous multi-threading (SMT) such that there can be effectively multiple logical central processing units (CPUs) operating simultaneously on the same physical processor hardware. Each of these logical CPUs is considered a thread. In such a multi-threading environment, it may be desirous for one thread to stop other threads on the processor core from executing. This may be in response to running a critical sequence or other sequence that needs the processor core resources or is manipulating processor core resources in a way that other threads would interfere with its execution.

    Method for executing a load instruction in a pipeline processor, putting the data in the target address into a buffer then loading the requested data.
    3.
    发明专利
    Method for executing a load instruction in a pipeline processor, putting the data in the target address into a buffer then loading the requested data. 未知

    公开(公告)号：GB2454816A

    公开(公告)日：2009-05-20

    申请号：GB0822115

    申请日：2008-12-04

    Applicant: IBM

    Inventor： TRONG SON DAO ,  HAESS JUERGEN ,  HUTTON DAVID SHANE ,  KLEIN MICHAEL ,  RELL JOHN GILBERT JR ,  SCHWARZ ERIC MARK ,  SHUM KEVIN CHUNG-LUNG

    IPC: G06F9/312 ,  G06F9/38

    Abstract: Disclosed is a method and system for operating the execution unit of a computer, the execution unit having a pipeline-based execution flow during which load instructions are processed. The load instructions having the function of loading data from a storage means into a predetermined location within the pipeline, preferably a register-implemented pipeline. The method has the steps of, when a load instruction occurs in the pipeline, reading (610) the current value of the target location, and buffering (620) the current target value at a predetermined location within said pipeline. Next, the value of the source location is loaded (610) and stored (620) at the target location, the pipeline is executed according to its execution flow, using the loaded value for computing purposes. If an event (630) indicating that the loaded value is not correct occurs, (660) the buffered original value may be used instead of the loaded value. The execution unit may be a floating point unit with the reading and/or loading of the data being done using a multiply-add data path.

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