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    Controlling execution of threads in a multi-threaded processor
    2.
    发明专利
    Controlling execution of threads in a multi-threaded processor 未知

    公开(公告)号：AU2015340844B2

    公开(公告)日：2018-10-18

    申请号：AU2015340844

    申请日：2015-10-21

    Applicant: IBM

    Inventor： SLEGEL TIMOTHY ,  ALEXANDER KHARY JASON ,  BUSABA FADI YUSUF ,  FARRELL MARK ,  RELL JR JOHN GILBERT

    IPC: G06F9/30

    Abstract: Execution of threads in a processor core is controlled. The processor core supports simultaneous multi-threading (SMT) such that there can be effectively multiple logical central processing units (CPUs) operating simultaneously on the same physical processor hardware. Each of these logical CPUs is considered a thread. In such a multi-threading environment, it may be desirous for one thread to stop other threads on the processor core from executing. This may be in response to running a critical sequence or other sequence that needs the processor core resources or is manipulating processor core resources in a way that other threads would interfere with its execution.

    CONTROLLING EXECUTION OF THREADS IN A MULTI-THREADED PROCESSOR
    3.
    发明专利
    CONTROLLING EXECUTION OF THREADS IN A MULTI-THREADED PROCESSOR 未知

    公开(公告)号：CA2961705A1

    公开(公告)日：2016-05-06

    申请号：CA2961705

    申请日：2015-10-21

    Applicant: IBM

    Inventor： SLEGEL TIMOTHY ,  ALEXANDER KHARY JASON ,  BUSABA FADI YUSUF ,  FARRELL MARK ,  RELL JOHN GILBERT JR

    IPC: G06F9/46 ,  G06F9/38 ,  G06F9/48

    Abstract: Execution of threads in a processor core is controlled. The processor core supports simultaneous multi-threading (SMT) such that there can be effectively multiple logical central processing units (CPUs) operating simultaneously on the same physical processor hardware. Each of these logical CPUs is considered a thread. In such a multi-threading environment, it may be desirous for one thread to stop other threads on the processor core from executing. This may be in response to running a critical sequence or other sequence that needs the processor core resources or is manipulating processor core resources in a way that other threads would interfere with its execution.

    CONTROLLING EXECUTION OF THREADS IN A MULTI-THREADED PROCESSOR
    4.
    发明专利
    CONTROLLING EXECUTION OF THREADS IN A MULTI-THREADED PROCESSOR 未知

    公开(公告)号：ZA201701306B

    公开(公告)日：2021-08-25

    申请号：ZA201701306

    申请日：2017-02-21

    Applicant: IBM

    Inventor： SLEGEL TIMOTHY ,  ALEXANDER KHARY JASON ,  BUSABA FADI YUSUF ,  FARRELL MARK ,  RELL JR JOHN GILBERT

    Abstract: Execution of threads in a processor core is controlled. The processor core supports simultaneous multi-threading (SMT) such that there can be effectively multiple logical central processing units (CPUs) operating simultaneously on the same physical processor hardware. Each of these logical CPUs is considered a thread. In such a multi-threading environment, it may be desirous for one thread to stop other threads on the processor core from executing. This may be in response to running a critical sequence or other sequence that needs the processor core resources or is manipulating processor core resources in a way that other threads would interfere with its execution.

    Control de ejecución de hilos en un procesador multihilo
    5.
    发明专利
    Control de ejecución de hilos en un procesador multihilo 未知

    公开(公告)号：ES2805010T3

    公开(公告)日：2021-02-10

    申请号：ES15787163

    申请日：2015-10-21

    Applicant: IBM

    Inventor： SLEGEL TIMOTHY ,  ALEXANDER KHARY JASON ,  BUSABA FADI YUSUF ,  FARRELL MARK ,  RELL JR JOHN GILBERT

    IPC: G06F9/48 ,  G06F9/30 ,  G06F9/38

    Abstract: Un método para controlar la ejecución de hilos en un entorno informático, comprendiendo dicho método: detener (604), mediante un hilo que se llevan a cabo en un procesador del entorno informático, la ejecución de otro hilo que se ejecuta dentro del procesador, usando la parada uno o más bits en uno o más registros compartidos del procesador, estando el uno o más registros compartidos por el hilo y el otro hilo, comprendiendo la parada: determinar si el otro hilo está prohibiendo su detención comprobando (600) un bit seleccionado en un registro de control, en donde el registro de control comprende un registro de dicho uno o más registros compartidos del procesador y un bit seleccionado en un registro de dirección de instrucción, en donde el registro de dirección de instrucción comprende un registro de uno o más registros del procesador únicos del otro hilo; detener, mediante el hilo, la búsqueda y ejecución de instrucción en el otro hilo, basándose en la etapa de determinación inmediatamente anterior que determina que el otro hilo no está prohibiendo su detención; determinar que el otro hilo ha dejado de ejecutarse dentro del procesador; y caracterizado por realizar (606), mediante el hilo, una operación de drenaje para todos los hilos en el entorno informático, en donde la operación de drenaje retiene la expedición de instrucción para el hilo hasta que todas las instrucciones del otro hilo se hayan drenado o evacuado, cuando la etapa de determinación inmediatamente anterior determina que el otro hilo ha dejado de ejecutarse dentro del procesador; realizar (618) mediante el hilo una o más operaciones dentro del procesador después de que la ejecución del otro hilo fue detenida dentro del procesador por el hilo; y basándose en la finalización de la una o más operaciones, permitir que (620) el otro hilo continúe ejecutándose dentro del procesador

    Controlling execution of threads in a multi-threaded processor
    6.
    发明专利
    Controlling execution of threads in a multi-threaded processor 未知

    公开(公告)号：AU2015340844A1

    公开(公告)日：2017-03-09

    申请号：AU2015340844

    申请日：2015-10-21

    Applicant: IBM

    Inventor： SLEGEL TIMOTHY ,  ALEXANDER KHARY JASON ,  BUSABA FADI YUSUF ,  FARRELL MARK ,  RELL JR JOHN GILBERT

    IPC: G06F9/30

    Abstract: Execution of threads in a processor core is controlled. The processor core supports simultaneous multi-threading (SMT) such that there can be effectively multiple logical central processing units (CPUs) operating simultaneously on the same physical processor hardware. Each of these logical CPUs is considered a thread. In such a multi-threading environment, it may be desirous for one thread to stop other threads on the processor core from executing. This may be in response to running a critical sequence or other sequence that needs the processor core resources or is manipulating processor core resources in a way that other threads would interfere with its execution.

    CONTROLLING EXECUTION OF THREADS IN A MULTI-THREADED PROCESSOR
    7.
    发明专利
    CONTROLLING EXECUTION OF THREADS IN A MULTI-THREADED PROCESSOR 未知

    公开(公告)号：SG11201701612VA

    公开(公告)日：2017-03-30

    申请号：SG11201701612V

    申请日：2015-10-21

    Applicant: IBM

    Inventor： SLEGEL TIMOTHY ,  ALEXANDER KHARY JASON ,  BUSABA FADI YUSUF ,  FARRELL MARK ,  RELL JR JOHN GILBERT

    IPC: G06F9/30

    Abstract: Execution of threads in a processor core is controlled. The processor core supports simultaneous multi-threading (SMT) such that there can be effectively multiple logical central processing units (CPUs) operating simultaneously on the same physical processor hardware. Each of these logical CPUs is considered a thread. In such a multi-threading environment, it may be desirous for one thread to stop other threads on the processor core from executing. This may be in response to running a critical sequence or other sequence that needs the processor core resources or is manipulating processor core resources in a way that other threads would interfere with its execution.

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