公开(公告)号：JPH0661606A

公开(公告)日：1994-03-04

申请号：JP11746793

申请日：1993-05-19

Applicant: IBM

Inventor： TOMASU MARIO SAIPOORA ,  POORU UIRIAMU KOTEUSU ,  IOANISU DAMIANAKISU ,  GUREN UORUDEN JIYONSON ,  PIITAA JIERARUDO REDAAMAN ,  RINDA KARORIN MASHIYUU ,  ROORENSU SHIYANGUUEI MOTSUKU

IPC: H01L25/18 ,  H01L25/065 ,  H01L25/07 ,  H05K1/14 ,  H05K1/18 ,  H05K3/32 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40

Abstract: PURPOSE: To form a cubic structure by laminating integrated circuit chips to make a three-dimensional packaging. CONSTITUTION: A first substrate 14 to which a chip 11 is mounted has conductors, one end of each conductor is electrically connected to a chip contact 206 and the other end forms pin-like electric connection mounts 444. The pin-like structure may be formed by a protrusion of the first substrate 14 having the conductors extending to the surface, or otherwise formed as a structure having parts extending like a cantilever from both faces of the end of the first substrate and solder charged in the space therebetween. The pin-like structure may be soldered directly to the conductors on the surface of a second substrate 21 or inserted and coupled in a hole of this substrate.