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公开(公告)号:JPH0661606A
公开(公告)日:1994-03-04
申请号:JP11746793
申请日:1993-05-19
Applicant: IBM
Inventor: TOMASU MARIO SAIPOORA , POORU UIRIAMU KOTEUSU , IOANISU DAMIANAKISU , GUREN UORUDEN JIYONSON , PIITAA JIERARUDO REDAAMAN , RINDA KARORIN MASHIYUU , ROORENSU SHIYANGUUEI MOTSUKU
IPC: H01L25/18 , H01L25/065 , H01L25/07 , H05K1/14 , H05K1/18 , H05K3/32 , H05K3/34 , H05K3/36 , H05K3/40
Abstract: PURPOSE: To form a cubic structure by laminating integrated circuit chips to make a three-dimensional packaging. CONSTITUTION: A first substrate 14 to which a chip 11 is mounted has conductors, one end of each conductor is electrically connected to a chip contact 206 and the other end forms pin-like electric connection mounts 444. The pin-like structure may be formed by a protrusion of the first substrate 14 having the conductors extending to the surface, or otherwise formed as a structure having parts extending like a cantilever from both faces of the end of the first substrate and solder charged in the space therebetween. The pin-like structure may be soldered directly to the conductors on the surface of a second substrate 21 or inserted and coupled in a hole of this substrate.
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公开(公告)号:JPS6332941A
公开(公告)日:1988-02-12
申请号:JP5704087
申请日:1987-03-13
Applicant: IBM
Inventor: RODONII TOREBAA HOJISON , HARII JIYOODAN JIYOONZU , PIITAA JIERARUDO REDAAMAN , CHIMOSHII KURAAKU REIRII , POORU ANDORIYUU MOSUKOUITSUTSU
IPC: H01L21/60 , H01L23/485 , H01L23/538 , H05K3/40
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公开(公告)号:JPH05211205A
公开(公告)日:1993-08-20
申请号:JP21193492
申请日:1992-08-10
Applicant: IBM
Inventor: RODONII TOREBAA HOJISON , HARII JIYOODAN JIYOONZU , PIITAA JIERARUDO REDAAMAN , CHIMOSHII KURAAKU REIRII , POORU ANDORIYUU MOSUKOUITSUTSU
IPC: H01L21/60 , H01L23/485 , H01L23/538 , H05K3/40
Abstract: PURPOSE: To provide a chip-connecting structure which enable defect correction, wiring modification and mounting of different types of chips. CONSTITUTION: An interconnection between a chip 12 and a wiring substrate 133 is effected by a beam/lead wiring layer having ball-shaped bonding contacts. The chip 12 has conductive pads 234, 235 and 236 thereon, while the wiring substrate 133 has conductive pads 35, 39 and 82 thereon. A wiring layer 10C has a conductive beam/lead 13C formed on an insulating film. The insulating film has openings 215 and 315 therein, and the beam/lead is extended into the opening. The beam/lead has ball-shaped bonding contacts at its both ends, one 238 of which is connected to the conductive pad 39 of the wiring substrate 133, and the other of which is connected to the conductive pad 236 of the chip.
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