公开(公告)号：JP2003114170A

公开(公告)日：2003-04-18

申请号：JP2002207153

申请日：2002-07-16

Applicant: IBM

Inventor： CROW JOHN D ,  PEPELJUGOSKI PETAR ,  SCHAUB JEREMY D

IPC: G01M11/00 ,  G01M11/04 ,  H01S5/00

Abstract: PROBLEM TO BE SOLVED: To provide a test probe by which an optical device can be tested at high speed and efficiently. SOLUTION: An optical testing apparatus comprises an optical fiber having a first numerical aperture at the front end part of the optical fiber. A positioning structure is attached to the optical fiber so that the first end part of the optical fiber is moved up to an arbitrary part on a substrate in order to test the optical device. The optical device can be arranged and installed in an arbitrary position on the substrate, and it supplies a light beam at an emission angle smaller than the first numerical aperture. A test head condenses the light beam via the optical fiber in order to test the optical device. Also a method in which the optical fiber is positioned in order to test the optical device is disclosed.

公开(公告)号：WO2005083750A3

公开(公告)日：2005-10-27

申请号：PCT/US2005005570

申请日：2005-02-22

Applicant: IBM ,  CHU JACK O ,  DEHLINGER GABRIEL K ,  GRILL ALFRED ,  KOESTER STEVEN J ,  OUYANG QIGING ,  SCHAUB JEREMY D

Inventor： CHU JACK O ,  DEHLINGER GABRIEL K ,  GRILL ALFRED ,  KOESTER STEVEN J ,  OUYANG QIGING ,  SCHAUB JEREMY D

IPC: H01L31/101

CPC classification number: H01L31/101

Abstract: The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n-­and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer. This method limits the amount of Si available for interdiffusion, thereby allowing the Ge layer to be annealed without causing substantial dilution of the Ge layer by the underlying Si.

Abstract translation: 本发明解决了创建与Si CMOS技术兼容的高速，高效率光电探测器的问题。 该结构由薄SOI衬底上的Ge吸收层组成，并利用隔离区，交替的n型和p型触点以及低电阻表面电极。 该器件利用掩埋绝缘层隔离底层衬底中产生的载流子，通过利用Ge吸收层在广谱上获得高量子效率，利用薄吸收层和窄电极间距实现低电压操作，以及兼容性 凭借其平面结构和使用IV族吸收材料而具有CMOS器件。 用于制造光电检测器的方法使用在薄SOI或外延氧化物上直接生长Ge，并且随后进行热退火以实现高质量的吸收层。 该方法限制了可用于相互扩散的Si的量，由此允许Ge层退火而不会导致Ge层基本上被下面的Si稀释。

公开(公告)号：DE602005001401T2

公开(公告)日：2008-02-21

申请号：DE602005001401

申请日：2005-02-22

Applicant: IBM

Inventor： CHU JACK O ,  DEHLINGER GABRIEL K ,  GRILL ALFRED ,  KOESTER STEVEN J ,  OUYANG QIGING ,  SCHAUB JEREMY D

IPC: H01L31/101

Abstract: The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer. This method limits the amount of Si available for interdiffusion, thereby allowing the Ge layer to be annealed without causing substantial dilution of the Ge layer by the underlying Si.

公开(公告)号：DE602005001401D1

公开(公告)日：2007-07-26

申请号：DE602005001401

申请日：2005-02-22

Applicant: IBM

Inventor： CHU JACK O ,  DEHLINGER GABRIEL K ,  GRILL ALFRED ,  KOESTER STEVEN J ,  OUYANG QIGING ,  SCHAUB JEREMY D

IPC: H01L31/101

Abstract: The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer. This method limits the amount of Si available for interdiffusion, thereby allowing the Ge layer to be annealed without causing substantial dilution of the Ge layer by the underlying Si.