公开(公告)号：CA2092631C

公开(公告)日：1997-04-08

申请号：CA2092631

申请日：1993-03-12

Applicant: IBM

Inventor： KEENER DON STEVEN ,  MCNEILL ANDREW BOYCE ,  SCHEIERN KEVIN LEE ,  NEWSOM THOMAS HAROLD ,  VOORHEES RICHARD W ,  WACHTEL EDWARD IRVING

IPC: G06F13/36 ,  G06F13/40 ,  G06F13/16

Abstract: Arrangements are disclosed for physically partitioning a bus having a well defined architecture as a physical entity, wherein the partitioning is logically transparent to a computer and devices which communicate through the bus and serves to avoid problems potentially arising because of the scope of actions permitted by the architecture. A typical bus architecture to which present arrangements have relevance is that associated with SCSI (Small Computer System Interface) buses. The potential problems allowed to occur architecturally involve: (a) exposures of data security/integrity; (b) excessive signal degradation due to use of signal rates which although allowed by the architecture are inappropriate for a particular bus loading environment also allowed by the architecture; (c) restrictions preventing parallel transfer of data between the computer and multiple storage devices; (d) restrictions unduly limiting the number of devices attachable to one logical bus path (one input-output channel of the computer). The disclosed arrangement partitions the bus into two or more physical entities which to the computer appears as one logical entity.

公开(公告)号：SG42891A1

公开(公告)日：1997-10-17

申请号：SG1996000456

申请日：1993-05-04

Applicant: IBM

Inventor： KEENER DON STEVEN ,  MCNEILL ANDREW BOYCE ,  NEWSOM THOMAS HAROLD ,  SCHEIERN KEVIN LEE ,  VOORHEES RICHARD W ,  WACHTEL EDWARD IRVING

IPC: G06F13/40 ,  G06F13/36

Abstract: Arrangements are disclosed for physically partitioning a bus having a well defined architecture as a physical entity, wherein the partitioning is logically transparent to a computer and devices which communicate through the bus and serves to avoid problems potentially arising because of the scope of actions permitted by the architecture. A typical bus architecture to which present arrangements have relevance is that associated with SCSI (Small Computer System Interface) buses. The potential problems allowed to occur architecturally involve: (a) exposures of data security/integrity; (b) excessive signal degradation due to use of signal rates which although allowed by the architecture are inappropriate for a particular bus loading environment also allowed by the architecture; (c) restrictions preventing parallel transfer of data between the computer and multiple storage devices; (d) restrictions unduly limiting the number of devices attachable to one logical bus path (one input-output channel of the computer). The disclosed arrangement partitions the bus into two or more physical entities which to the computer appears as one logical entity.

公开(公告)号：IN186098B

公开(公告)日：2001-06-16

申请号：IN363DE1993

申请日：1993-04-13

Applicant: IBM

Inventor： KEENER DON STEVEN ,  MCNEILL ANDREW BOYCE ,  NEWSOM THOMAS HAROLD ,  SCHEIERN KEVIN LEE ,  VOORHEES RICHARD W ,  WACHTEL EDWARD IRVING

IPC: G06F13/38