公开(公告)号：JP2000058655A

公开(公告)日：2000-02-25

申请号：JP17440199

申请日：1999-06-21

Applicant: IBM

Inventor： ARNDT KENNETH C ,  GAMBINO JEFFREY P ,  MANDELMAN JACK A ,  NARAYAN CHANDRASEKHAR ,  SCHNABEL RAINER F ,  SCHUTZ RONALD J ,  TOEBBEN DIRK

IPC: H01L21/82 ,  H01L21/768 ,  H01L23/525

Abstract: PROBLEM TO BE SOLVED: To improve the control of thickness of an insulator layer on a fuse structure, by a method wherein a dielectric structure is positioned on a conduction level, and electric connection is performed at a selected position of the conduction level through the dielectric structure. SOLUTION: On a semiconductor substrate 10 an electric conduction level 1 is formed by using conductive material selected out of aluminum, copper, aluminum copper alloy, and doped polysilicon having metal type conductivity. A dielectric etching stop material layer 2 is stuck on the upper surface of the electric conduction level 1. Electric connection is performed to a selected position of the electric conduction level 1 through the dielectric etching stop material layer 2, and a conductive fuse 21 is constituted. As a result control of the thickness of an insulator layer on the fuse structure containing a self-aligned isolation cap can be improved.

公开(公告)号：JP2000031281A

公开(公告)日：2000-01-28

申请号：JP17745099

申请日：1999-06-23

Applicant: SIEMENS AG ,  IBM

Inventor： SCHNABEL RAINER F ,  GAMBINO JEFFREY ,  LU ZHIJIAN

IPC: H01L21/027 ,  H01L21/768 ,  G03F7/20

Abstract: PROBLEM TO BE SOLVED: To reduce layout area in the production process of semiconductor chip by reflecting radiation from a reflective material to a resist layer and increasing irradiation of the resist layer at the time of development. SOLUTION: A metal layer including a conductive or metal line 14 is formed in a dielectric layer 12 and a silicon dioxide layer 16 containing a dielectric material is formed on the metal layer. A transparent resist layer 18 is formed on the layer 16 and a light beam from a radiation source 20 is transmitted through the layers 18, 16 in the direction of arrow A. The radiation light beam is reflected on the metal line 14 and transmitted again through the resist layer 18 at location 28 and the radiation light beam not impinging on the metal line 14 is substantially absorbed by the dielectric layer 12. More specifically, the resist layer 18 is developed while increasing irradiation with radiation light.

公开(公告)号：JPH11265866A

公开(公告)日：1999-09-28

申请号：JP512899

申请日：1999-01-12

Applicant: IBM ,  SIEMENS AG

Inventor： JASO MARK A ,  SCHNABEL RAINER F

IPC: H01L21/304 ,  H01L21/321

Abstract: PROBLEM TO BE SOLVED: To polish efficiently a work covered with a metal layer applying a damascene method by a method wherein a wafer covered with the metal layer is polished unit the metal layer is stopped leaving on the outside of a desired circuit pattern and the outside of an arbitrary dummy circuit pattern. SOLUTION: Opening parts 15a, 15b, 15c and 15d for interconnecting opening parts are formed in a silicon dioxide dielectric layer 14 laminated on a silicon substrate 13, a metal layer 16, which is extended from the surface of the layer 14 to the surface of the silicon wafer 13, is covered on the upper surface of the layer 14 and the opening parts 15a to 15d and dummy opening parts 20 are filled with the layer 16, but a metallization on the surface of a region 17 is evenly executed. The metallized wafer is placed on a chemical polishing machine using a well-know means and the layer 16 is removed up to the surface of the layer 14. The surface of the remaining layer 14, which is shown at the end parts 14a and 14b on both sides of the layer 14, is substantially formed horizontally extending over the whole region 17 of chips.