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公开(公告)号:JP2000058655A
公开(公告)日:2000-02-25
申请号:JP17440199
申请日:1999-06-21
Applicant: IBM
Inventor: ARNDT KENNETH C , GAMBINO JEFFREY P , MANDELMAN JACK A , NARAYAN CHANDRASEKHAR , SCHNABEL RAINER F , SCHUTZ RONALD J , TOEBBEN DIRK
IPC: H01L21/82 , H01L21/768 , H01L23/525
Abstract: PROBLEM TO BE SOLVED: To improve the control of thickness of an insulator layer on a fuse structure, by a method wherein a dielectric structure is positioned on a conduction level, and electric connection is performed at a selected position of the conduction level through the dielectric structure. SOLUTION: On a semiconductor substrate 10 an electric conduction level 1 is formed by using conductive material selected out of aluminum, copper, aluminum copper alloy, and doped polysilicon having metal type conductivity. A dielectric etching stop material layer 2 is stuck on the upper surface of the electric conduction level 1. Electric connection is performed to a selected position of the electric conduction level 1 through the dielectric etching stop material layer 2, and a conductive fuse 21 is constituted. As a result control of the thickness of an insulator layer on the fuse structure containing a self-aligned isolation cap can be improved.
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公开(公告)号:WO2004027824A2
公开(公告)日:2004-04-01
申请号:PCT/US0329085
申请日:2003-09-16
Applicant: INFINEON TECHNOLOGIES AG , IBM , SCHUTZ RONALD J , ROBL WERNER , MALIK RAJEEV , CLEVENGER LARRY , GLUSCHENKOV OLEG , CABRAL CYRIL JR , IGGULDEN ROY C , WANG YUN-YU , WONG KWONG HON , MCSTAY IRENE
Inventor: SCHUTZ RONALD J , ROBL WERNER , MALIK RAJEEV , CLEVENGER LARRY , GLUSCHENKOV OLEG , CABRAL CYRIL JR , IGGULDEN ROY C , WANG YUN-YU , WONG KWONG HON , MCSTAY IRENE
IPC: H01L20060101 , H01L21/28 , H01L21/3205 , H01L21/336 , H01L21/4763 , H01L21/768 , H01L23/522 , H01L29/40 , H01L29/51 , H01L29/78 , H01L
CPC classification number: H01L21/7685 , H01L21/28052 , H01L21/28061 , H01L21/76838 , H01L21/76855 , H01L21/823828 , H01L21/823842 , H01L29/4941 , H01L29/51 , H01L29/517 , H01L29/518 , H01L29/78 , H01L2221/1078
Abstract: A conductive structure in an integrated circuit (12), and a method of forming the structure, is provided that includes a polysilicon layer (30), a thin layer containing titanium over the polysilicon, a tungsten nitride layer (34) over the titanium-containing layer and a tungsten layer over the tungsten nitride layer. The structure also includes a silicon nitride interfacial region (38) between the polysilicon layer and the titanium-containing layer. The structure withstands high-temperature processing without substantial formation of metal silicides in the polysilicon layer (30) and the tungsten layer (32), and provides low interface resistance between the tungsten layer and the polysilicon layer.
Abstract translation: 提供了集成电路(12)中的导电结构以及形成该结构的方法,该导电结构包括多晶硅层(30),在多晶硅上包含钛的薄层,在钛 - 氮化镓层上的氮化钨层(34) 在氮化钨层上形成含钨层和钨层。 该结构还包括在多晶硅层和含钛层之间的氮化硅界面区域(38)。 该结构耐受高温处理而在多晶硅层(30)和钨层(32)中基本上不形成金属硅化物,并且在钨层和多晶硅层之间提供低的界面电阻。
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公开(公告)号:DE10393309T5
公开(公告)日:2005-12-29
申请号:DE10393309
申请日:2003-09-16
Applicant: IBM , INFINEON TECHNOLOGIES AG
Inventor: CABRAL CYRIL JR , IGGULDEN ROY C , MCSTAY IRENE LENNOX , CLEVENGER LAWRENCE A , WANG YUN YU , WONG KEITH KWONG HON , ROBL WERNER , GLUSCHENKOV OLEG , MALIK RAJEEV , SCHUTZ RONALD J
IPC: H01L20060101 , H01L21/28 , H01L21/3205 , H01L21/336 , H01L21/4763 , H01L21/768 , H01L23/522 , H01L29/40 , H01L29/51 , H01L29/78
Abstract: A conductive structure in an integrated circuit ( 12 ), and a method of forming the structure, is provided that includes a polysilicon layer ( 30 ), a thin layer containing titanium over the polysilicon, a tungsten nitride layer ( 34 ) over the titanium-containing layer and a tungsten layer over the tungsten nitride layer. The structure also includes a silicon nitride interfacial region ( 38 ) between the polysilicon layer and the titanium-containing layer. The structure withstands high-temperature processing without substantial formation of metal silicides in the polysilicon layer ( 30 ) and the tungsten layer ( 32 ), and provides low interface resistance between the tungsten layer and the polysilicon layer.
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公开(公告)号:AU2003273328A8
公开(公告)日:2004-04-08
申请号:AU2003273328
申请日:2003-09-16
Applicant: IBM , INFINEON TECHNOLOGIES AG
Inventor: CLEVENGER LARRY , GLUSCHENKOV OLEG , CABRAL CYRIL JR , IGGULDEN ROY C , WANG YUN-YU , WONG KWONG HON , MCSTAY IRENE , SCHUTZ RONALD J , ROBL WERNER , MALIK RAJEEV
IPC: H01L20060101 , H01L21/28 , H01L21/3205 , H01L21/336 , H01L21/4763 , H01L21/768 , H01L23/522 , H01L29/40 , H01L29/51 , H01L29/78
Abstract: A conductive structure in an integrated circuit ( 12 ), and a method of forming the structure, is provided that includes a polysilicon layer ( 30 ), a thin layer containing titanium over the polysilicon, a tungsten nitride layer ( 34 ) over the titanium-containing layer and a tungsten layer over the tungsten nitride layer. The structure also includes a silicon nitride interfacial region ( 38 ) between the polysilicon layer and the titanium-containing layer. The structure withstands high-temperature processing without substantial formation of metal silicides in the polysilicon layer ( 30 ) and the tungsten layer ( 32 ), and provides low interface resistance between the tungsten layer and the polysilicon layer.
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公开(公告)号:DE69939300D1
公开(公告)日:2008-09-25
申请号:DE69939300
申请日:1999-06-17
Applicant: SIEMENS AG , IBM
Inventor: ARNDT KENNETH C , GAMBINO JEFFREY P , MANDELMA JACK A , NARAYAN CHANDRASEKHAR , SCHNABEL RAINES F , SCHUTZ RONALD J , TOBBEN DIRK
IPC: H01L21/82 , H01L23/525 , H01L21/768
Abstract: A semiconductor structure comprising a semiconductor substrate, an electrically conductive level on the substrate and a metal fuse located at the conductive level wherein the fuse comprises a self-aligned dielectric etch stop layer thereon is provided along with processes for its fabrication.
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