公开(公告)号：GB2506556A

公开(公告)日：2014-04-02

申请号：GB201400400

申请日：2012-07-02

Applicant: IBM

Inventor： ELMEGREEN BRUCE GORDON ,  MARTYNA GLENN J ,  NEWNS DENNIS ,  ROSSNAGEL STEPHEN ,  SOLOMAN PAUL MICHAEL

IPC: H01L41/09 ,  H01L41/08 ,  H01L49/00

Abstract: A 4-terminal piezoelectronic transistor (PET) which includes a piezoelectric (PE) material disposed between first and second electrodes; an insulator material disposed on the second electrode; a third electrode disposed on the insulator material and a piezoresistive (PR) material disposed between the third electrode and a fourth electrode. An applied voltage across the first and second electrodes causing a pressure from the PE material to be applied to the PR material through the insulator material, the electrical resistance of the PR material being dependent upon the pressure applied by the PE material. The first and second electrodes are electrically isolated from the third and fourth electrodes. Also disclosed are logic devices fabricated from 4-terminal PETs and a method of fabricating a 4-terminal PET.

公开(公告)号：GB2503048B

公开(公告)日：2014-04-09

申请号：GB201212740

申请日：2011-04-12

Applicant: IBM

Inventor： LAUER ISAAC ,  SOLOMAN PAUL MICHAEL ,  KOESTER STEVEN ,  MAJUMDAR AMLAN

IPC: H01L29/739 ,  H01L29/165

公开(公告)号：GB2506556B

公开(公告)日：2015-06-10

申请号：GB201400400

申请日：2012-07-02

Applicant: IBM

Inventor： ELMEGREEN BRUCE GORDON ,  MARTYNA GLENN J ,  NEWNS DENNIS ,  ROSSNAGEL STEPHEN M ,  SOLOMAN PAUL MICHAEL

IPC: H01L41/09 ,  H01L41/08 ,  H01L49/00

Abstract: A 4-terminal piezoelectronic transistor (PET) which includes a piezoelectric (PE) material disposed between first and second electrodes; an insulator material disposed on the second electrode; a third electrode disposed on the insulator material and a piezoresistive (PR) material disposed between the third electrode and a fourth electrode. An applied voltage across the first and second electrodes causing a pressure from the PE material to be applied to the PR material through the insulator material, the electrical resistance of the PR material being dependent upon the pressure applied by the PE material. The first and second electrodes are electrically isolated from the third and fourth electrodes. Also disclosed are logic devices fabricated from 4-terminal PETs and a method of fabricating a 4-terminal PET.

公开(公告)号：GB2503048A

公开(公告)日：2013-12-18

申请号：GB201212740

申请日：2011-04-12

Applicant: IBM

Inventor： LAUER ISAAC ,  SOLOMAN PAUL MICHAEL ,  KOESTER STEVEN ,  MAJUMDAR AMLAN

IPC: H01L29/739 ,  H01L29/165

Abstract: Exemplary embodiments include a method for fabricating a heterojunction tunnel field-effect-transistor (FET), the method including forming a gate region on a silicon layer of a silicon-on-insulator (SOI) substrate, forming a drain region on the silicon layer adjacent the gate region and forming a vertical heterojunction source region adjacent the gate region, wherein the vertical heterojunction source region generates a tunnel path inline with a gate field associated with the gate region.