公开(公告)号：JP2007311797A

公开(公告)日：2007-11-29

申请号：JP2007130660

申请日：2007-05-16

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： GAMBINO JEFFREY PETER ,  SON VAN NGUYEN

IPC: H01L27/10 ,  H01L29/06

CPC classification number: B82Y10/00 ,  G11C13/025 ,  H01L21/7682 ,  H01L29/0665 ,  H01L29/685 ,  H01L29/86 ,  H01L51/0048 ,  H01L51/0554 ,  H01L2221/1094

Abstract: PROBLEM TO BE SOLVED: To provide an encapsulated nanotube structure for protecting a semiconductor device formed on an electrical structure, from an external factor. SOLUTION: A semiconductor device includes a conductive nanotube formed on a first conductive member, so that a first gap exists between a lower side of the conductive nanotube and an upper side of the first conductive member. A second insulating layer is formed on the conductive nanotube. A second gap exists between the upper side of the conductive nanotube and a first part of the second insulating layer. A first via opening and a second via opening are respectively passed through the second insulating layer and extended into the second gap. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于保护形成在电气结构上的半导体器件与外部因素的封装的纳米管结构。 解决方案：半导体器件包括形成在第一导电构件上的导电纳米管，使得在导电纳米管的下侧和第一导电构件的上侧之间存在第一间隙。 在导电性纳米管上形成第二绝缘层。 在导电性纳米管的上侧和第二绝缘层的第一部分之间存在第二间隙。 第一通孔开口和第二通孔开口分别穿过第二绝缘层并延伸到第二间隙中。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：GB2567363B

公开(公告)日：2019-08-28

申请号：GB201901614

申请日：2017-07-21

Applicant: IBM

Inventor： SON VAN NGUYEN ,  TENKO YAMASHITA ,  KANGGUO CHENG ,  THOMAS JASPER HAIGH JR ,  CHANRO PARK ,  ERIC LINIGER ,  JUNTAO LI ,  SANJAY MEHTA

IPC: H01L21/768 ,  H01L21/02 ,  H01L29/49

公开(公告)号：GB2567363A

公开(公告)日：2019-04-10

申请号：GB201901614

申请日：2017-07-21

Applicant: IBM

Inventor： SON VAN NGUYEN ,  TENKO YAMASHITA ,  KANGGUO CHENG ,  THOMAS JASPER HAIGH JR ,  CHANRO PARK ,  ERIC LINIGER ,  JUNTAO LI ,  SANJAY MEHTA

IPC: H01L21/768 ,  H01L21/02 ,  H01L29/49

Abstract: Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.