公开(公告)号：GB2603403A

公开(公告)日：2022-08-03

申请号：GB202205176

申请日：2020-08-19

Applicant: IBM

Inventor： RISA MIYAZAWA ,  TAKAHITO WATANABE ,  HIROYUKI MORI ,  KEISHI OKAMOTO

IPC: H01L21/06

Abstract: A method of fabricating a connection structure is disclosed. The method includes providing a substrate that has a top surface and includes a set of pads for soldering, each of which has a pad surface exposed from the top surface of the substrate. The method also includes applying a surface treatment to a part of the top surface of the substrate close to the pads and the pad surface of each pad so as to make at least the part of the top surface and the pad surfaces of the pads rougher.

公开(公告)号：GB2578413B

公开(公告)日：2020-08-19

申请号：GB202002809

申请日：2018-07-26

Applicant: IBM

Inventor： AKIHIRO HORIBE ,  TAKAHITO WATANABE ,  KUNIAKI SUEOKA

IPC: H01M10/0585 ,  H01M2/20 ,  H01M10/04 ,  H01M10/0562

Abstract: A technique relating to a battery structure is disclosed. A base substrate and a battery layer having a support substrate are prepared. The battery layer includes a protection layer formed on the support substrate, a film battery element formed on the protection layer and an insulator covering the film battery element. The battery layer is placed onto the base substrate with the bottom of the support substrate facing up. The support substrate is then removed from the battery layer at least in part by etching while protecting the film battery element by the protection layer. A stacked battery structure including the base substrate and the two or more battery layers is also disclosed.

公开(公告)号：GB2603345A

公开(公告)日：2022-08-03

申请号：GB202204022

申请日：2020-08-26

Applicant: IBM

Inventor： RISA MIYAZAWA ,  TAKAHITO WATANABE ,  HIROYUKI MORI ,  KEISHI OKAMOTO

IPC: H01L23/538

Abstract: An interconnection structure is disclosed. The interconnection structure includes a base substrate, a set of conductive padsdisposed on the base substrate and an interconnection layer disposed on the base substrate. The interconnection layer has an edge located next to the set of the conductive pads and includes a set of side connection pads located and disposed at the edge of the interconnection layer. Each side connection pad is arranged with respect to a corresponding one of the conductive pads disposed on the base substrate.

公开(公告)号：GB2578413A

公开(公告)日：2020-05-06

申请号：GB202002809

申请日：2018-07-26

Applicant: IBM

Inventor： AKIHIRO HORIBE ,  TAKAHITO WATANABE ,  KUNIAKI SUEOKA

IPC: H01M10/0585 ,  H01M2/20 ,  H01M10/04 ,  H01M10/0562

Abstract: A technique relating to a battery structure is disclosed. A base substrate and a battery layer having a support substrate are prepared. The battery layer includes a protection layer formed on the support substrate, a film battery element formed on the protection layer and an insulator covering the film battery element. The battery layer is placed onto the base substrate with the bottom of the support substrate facing up. The support substrate is then removed from the battery layer at least in part by etching while protecting the film battery element by the protection layer. A stacked battery structure including the base substrate and the two or more battery layers is also disclosed.