公开(公告)号：GB2603403A

公开(公告)日：2022-08-03

申请号：GB202205176

申请日：2020-08-19

Applicant: IBM

Inventor： RISA MIYAZAWA ,  TAKAHITO WATANABE ,  HIROYUKI MORI ,  KEISHI OKAMOTO

IPC: H01L21/06

Abstract: A method of fabricating a connection structure is disclosed. The method includes providing a substrate that has a top surface and includes a set of pads for soldering, each of which has a pad surface exposed from the top surface of the substrate. The method also includes applying a surface treatment to a part of the top surface of the substrate close to the pads and the pad surface of each pad so as to make at least the part of the top surface and the pad surfaces of the pads rougher.

公开(公告)号：GB2627899B

公开(公告)日：2025-02-12

申请号：GB202408555

申请日：2022-09-04

Applicant: IBM

Inventor： AKIHIRO HORIBE ,  QIANWEN CHEN ,  RISA MIYAZAWA ,  MICHAEL BELYANSKY ,  JOHN KNICKERBOCKER ,  TAKASHI HISADA

IPC: H01L21/683

Abstract: Handler wafers and methods of handling a wafer include positioning a handler, which is attached to a wafer by a bonding layer that comprises a debonding layer, an optical enhancement layer, and an anti-reflection layer. The handler is debonded from the wafer using a laser that emits laser energy at a wavelength that is absorbed by the debonding layer and that is confined to the debonding layer by the optical enhancement layer, such that the material of the debonding layer ablates when exposed to the laser energy to release the wafer.

公开(公告)号：GB2603345A

公开(公告)日：2022-08-03

申请号：GB202204022

申请日：2020-08-26

Applicant: IBM

Inventor： RISA MIYAZAWA ,  TAKAHITO WATANABE ,  HIROYUKI MORI ,  KEISHI OKAMOTO

IPC: H01L23/538

Abstract: An interconnection structure is disclosed. The interconnection structure includes a base substrate, a set of conductive padsdisposed on the base substrate and an interconnection layer disposed on the base substrate. The interconnection layer has an edge located next to the set of the conductive pads and includes a set of side connection pads located and disposed at the edge of the interconnection layer. Each side connection pad is arranged with respect to a corresponding one of the conductive pads disposed on the base substrate.