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公开(公告)号:GB2362759A
公开(公告)日:2001-11-28
申请号:GB0028820
申请日:2000-11-27
Applicant: IBM
Inventor: BRODSKY WILLIAM L , SATHE SANJEEV B , THIEL GEORGE H
IPC: H01L23/04 , H01L21/304 , H01L23/42 , H01L29/06
Abstract: An electronic package 50 has an electronic component 58 with a first surface 59 electrically mounted to a substrate 54 and a second arcuate surface 64 with a contour such that the distance between the first surface and the second arcuate surface is greatest substantially near the centre of the electronic component. A method of forming a electronic package comprises providing an electronic component 58 with a first featured surface 59 and a second surface 64, and removing a portion of the second surface 64 so that the second surface 64 is substantially arcuate, with a thickness greatest substantially near the centre of the electronic component. A cap, cover plate, or heat sink 62, maybe mounted on a carrier 52 and the chip 58 by an adhesive 66. In alternative method of forming a chip, an electronic component is provided with a first featured surface and a second planar surface, a first portion of the second planar surface is removed to form a first arcuate surface and the second portion of the second planar surface is removed to form a second arcuate surface. A method of forming an electronic package having at least one profiled edge is also disclosed. A concave profiling tool 120 may be used to grind the shape of the chip.
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公开(公告)号:AU2003251438A1
公开(公告)日:2004-03-11
申请号:AU2003251438
申请日:2003-07-22
Applicant: IBM
Inventor: DARBHA KRISHNA , HENDERSON DONALD W , LEHMAN LAWRENCE P , THIEL GEORGE H , CALETKA DAVID V
IPC: B23K35/14 , B23K35/26 , C22C12/00 , C22C13/02 , H01L21/56 , H01L21/60 , H01L23/485 , H05K3/28 , H05K3/34 , H01R4/00
Abstract: An electronic package is provided including a substrate, a device mounted on the substrate, and a solder member electrically coupling the device to the substrate. The package includes a dielectric material positioned substantially around the solder member which forms a physical connection between the substrate and the device. The volume of the solder member contracts during melting thereof to prevent failure of the physical connection and/or the electrical coupling between the substrate and the device.
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公开(公告)号:SG76594A1
公开(公告)日:2000-11-21
申请号:SG1999001035
申请日:1999-02-27
Applicant: IBM
Inventor: CARDEN TOMOTHY F , DEARING GLENN O , DESAI KISHOR V , ENGLE STEPHEN R , STUTZMAN RANDALL , THIEL GEORGE H
Abstract: A chip carrier package that includes a cover plate attached to the stiffener by a reflowable bonding material is disclosed. Additionally, a thermally and electrically conductive bonding material between the cover plate and the chip itself may be included. Also a chip package including an alignment device to aid in properly aligning the cover plate on the stiffener. Furthermore, a method of packaging a chip including providing a reflowable material between the cover plate and stiffener body for attaching the cover plate to the stiffener, and simultaneously attaching the cover plate to the stiffener with an attaching of the carrier to an electronic circuit board.
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公开(公告)号:MY139067A
公开(公告)日:2009-08-28
申请号:MYPI9900524
申请日:1999-02-12
Applicant: IBM
Inventor: CARDEN TIMOTHY F , DEARING GLENN O , DESAI KISHOR V , ENGLE STEPHEN R , STUTZMAN RANDALL , THIEL GEORGE H
Abstract: A CHIP CARRIER PACKAGE (10) THAT INCLUDES A COVER PLATE (20) ATTACHED TO THE STIFFENER (30) BY A REFLOWABLE BONDING MATERIAL (70, 72) IS DISCLOSED. ADDITIONALLY, A THERMALLY AND ELECTRICALLY CONDUCTIVE BONDING MATERIAL BETWEEN THE COVER PLATE AND THE CHIP (40) ITSELF MAY BE INCLUDED. ALSO A CHIP PACKAGE INCLUDING AN ALIGNMENT DEVICE (290) TO AID IN PROPERLY ALIGNING THE COVER PLATE ON THE STIFFENER IS DISCLOSED. FURTHERMORE, A METHOD OF PACKAGING A CHIP INCLUDING PROVIDING A REFLOWABLE MATERIAL BETWEEN THE COVER PLATE AND STIFFENER BODY FOR ATTACHING THE COVER PLATE TO THE STIFFENER, AND .SIMULTANEOUSLY ATTACHING THE COVER PLATE TO THE STIFFENER WITH AN ATTACHING OF THE CARRIER (50) TO AN ELECTRONIC CIRCUIT BOARD (80) IS DISCLOSED.
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公开(公告)号:GB2362759B
公开(公告)日:2004-08-25
申请号:GB0028820
申请日:2000-11-27
Applicant: IBM
Inventor: BRODSKY WILLIAM L , SATHE SANJEEV B , THIEL GEORGE H
IPC: H01L23/04 , H01L21/304 , H01L23/42 , H01L29/06
Abstract: A semiconductor chip package having a non-planar chip therein, to reduce the stress concentrations between the chip and cover plate. In particular, a chip and method of forming a chip having a non-planar or "domed" back surface, wherein the thickness of the non-planar chip is greatest substantially near the center of the chip. Further, a method of rounding the edges or corners of the chip to reduce crack propagation originating at the edges of the chip.
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