Non Planar Surface for Semiconductor Chips

    公开(公告)号:GB2362759A

    公开(公告)日:2001-11-28

    申请号:GB0028820

    申请日:2000-11-27

    Applicant: IBM

    Abstract: An electronic package 50 has an electronic component 58 with a first surface 59 electrically mounted to a substrate 54 and a second arcuate surface 64 with a contour such that the distance between the first surface and the second arcuate surface is greatest substantially near the centre of the electronic component. A method of forming a electronic package comprises providing an electronic component 58 with a first featured surface 59 and a second surface 64, and removing a portion of the second surface 64 so that the second surface 64 is substantially arcuate, with a thickness greatest substantially near the centre of the electronic component. A cap, cover plate, or heat sink 62, maybe mounted on a carrier 52 and the chip 58 by an adhesive 66. In alternative method of forming a chip, an electronic component is provided with a first featured surface and a second planar surface, a first portion of the second planar surface is removed to form a first arcuate surface and the second portion of the second planar surface is removed to form a second arcuate surface. A method of forming an electronic package having at least one profiled edge is also disclosed. A concave profiling tool 120 may be used to grind the shape of the chip.

    High performance chip package and method

    公开(公告)号:SG76594A1

    公开(公告)日:2000-11-21

    申请号:SG1999001035

    申请日:1999-02-27

    Applicant: IBM

    Abstract: A chip carrier package that includes a cover plate attached to the stiffener by a reflowable bonding material is disclosed. Additionally, a thermally and electrically conductive bonding material between the cover plate and the chip itself may be included. Also a chip package including an alignment device to aid in properly aligning the cover plate on the stiffener. Furthermore, a method of packaging a chip including providing a reflowable material between the cover plate and stiffener body for attaching the cover plate to the stiffener, and simultaneously attaching the cover plate to the stiffener with an attaching of the carrier to an electronic circuit board.

    HIGH PERFORMANCE CHIP PACKAGING METHOD

    公开(公告)号:MY139067A

    公开(公告)日:2009-08-28

    申请号:MYPI9900524

    申请日:1999-02-12

    Applicant: IBM

    Abstract: A CHIP CARRIER PACKAGE (10) THAT INCLUDES A COVER PLATE (20) ATTACHED TO THE STIFFENER (30) BY A REFLOWABLE BONDING MATERIAL (70, 72) IS DISCLOSED. ADDITIONALLY, A THERMALLY AND ELECTRICALLY CONDUCTIVE BONDING MATERIAL BETWEEN THE COVER PLATE AND THE CHIP (40) ITSELF MAY BE INCLUDED. ALSO A CHIP PACKAGE INCLUDING AN ALIGNMENT DEVICE (290) TO AID IN PROPERLY ALIGNING THE COVER PLATE ON THE STIFFENER IS DISCLOSED. FURTHERMORE, A METHOD OF PACKAGING A CHIP INCLUDING PROVIDING A REFLOWABLE MATERIAL BETWEEN THE COVER PLATE AND STIFFENER BODY FOR ATTACHING THE COVER PLATE TO THE STIFFENER, AND .SIMULTANEOUSLY ATTACHING THE COVER PLATE TO THE STIFFENER WITH AN ATTACHING OF THE CARRIER (50) TO AN ELECTRONIC CIRCUIT BOARD (80) IS DISCLOSED.

    Non-planar surface for semiconductor chips

    公开(公告)号:GB2362759B

    公开(公告)日:2004-08-25

    申请号:GB0028820

    申请日:2000-11-27

    Applicant: IBM

    Abstract: A semiconductor chip package having a non-planar chip therein, to reduce the stress concentrations between the chip and cover plate. In particular, a chip and method of forming a chip having a non-planar or "domed" back surface, wherein the thickness of the non-planar chip is greatest substantially near the center of the chip. Further, a method of rounding the edges or corners of the chip to reduce crack propagation originating at the edges of the chip.

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