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公开(公告)号:US3859633A
公开(公告)日:1975-01-07
申请号:US37519173
申请日:1973-06-29
Applicant: IBM
Inventor: HO ALLEN P , TING YEE-MING
CPC classification number: G06K9/00067 , G06K9/4638
Abstract: A system for detecting bifurcations and ridge endings (minutiae) in a fingerprint or on similar patterns in which two lines merge into one. The print is optically scanned, converted into electrical signals and entered into a novel continuity logic network. The presence of a bifurcation in the network results in three distinct outputs on the periphery of the network from at least two sides. The split in the bifurcation may also be detected by reversing the polarity of the electrical signals and detecting a single output. Means are also provided for ensuring that a single bifurcation is detected only once. Ridge endings are treated as reverse-polarity bifurcations and can be detected by the same system elements.
Abstract translation: 用于检测指纹中的分叉和脊端(细节)的系统,或者将两条线合并成一个的相似图案。 打印件被光学扫描,转换成电信号并进入一个新颖的连续性逻辑网络。 在网络中存在分支,从至少两侧在网络的外围产生三个不同的输出。 也可以通过反转电信号的极性并检测单个输出来检测分叉中的分割。 还提供了用于确保单个分叉仅被检测到一次的手段。 脊线端点被视为反极性分岔,并且可以通过相同的系统元件来检测。
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公开(公告)号:DE68924435T2
公开(公告)日:1996-05-30
申请号:DE68924435
申请日:1989-01-09
Applicant: IBM
Inventor: RODIGER WILLIAM KING , THORSON JON EDWIN , TING YEE-MING
IPC: G06F15/16 , G06F9/52 , G06F13/14 , G06F13/16 , G06F15/167 , G06F15/177
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公开(公告)号:DE68924435D1
公开(公告)日:1995-11-09
申请号:DE68924435
申请日:1989-01-09
Applicant: IBM
Inventor: RODIGER WILLIAM KING , THORSON JON EDWIN , TING YEE-MING
IPC: G06F15/16 , G06F9/52 , G06F13/14 , G06F13/16 , G06F15/167 , G06F15/177
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公开(公告)号:CA1038498A
公开(公告)日:1978-09-12
申请号:CA203050
申请日:1974-06-21
Applicant: IBM
Inventor: HO ALLEN P , TING YEE-MING
Abstract: IMPROVED MINUTIAE RECOGNITION SYSTEM A system for detecting bifurcations and ridge endings (minutiae) in a fingerprint or on similar patterns in which two lines merge into one. The print is optically scanned, converted into electrical signals and entered into a novel continuity logic network. The presence of a bifurcation in the network results in three distinct outputs on the periphery of the network from at least two sides. The split in the bifurcation may also be detected by reversing the polarity of the electrical signals and detecting a single output. Means are also provided for ensuring that a single bifurcation is detected only once. Ridge endings are treated as reverse-polarity bifurcations and can be detected by the same system elements.
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公开(公告)号:CA2074879A1
公开(公告)日:1993-05-01
申请号:CA2074879
申请日:1992-07-29
Applicant: IBM
Inventor: GRUNBOK WARREN W , KNOWLES BILLY J , MILANI WILLIAM R , MORAN DOUGLAS R , PONTIUS DALE E , PRICE DONALD W , TAMLYN ROBERT , TING YEE-MING , TRAN DE , YEH HENRY
Abstract: KI9-91-010 MEMORY SYSTEM AND UNIQUE MEMORY CHIP ALLOWING ISLAND INTERLACE A memory system and a unique memory chip is disclosed wherein multiple islands on a chip can be separately accessed by separate island controllers whereby concurrent use of the several islands or arrays on a chip can be achieved.
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公开(公告)号:DE2429556A1
公开(公告)日:1975-01-16
申请号:DE2429556
申请日:1974-06-20
Applicant: IBM
Inventor: HO ALLEN PANG-I , LEE HUA-TUNG , TING YEE-MING
Abstract: 1428636 Pattern recognition systems INTERNATIONAL BUSINESS MACHINES CORP 2 May 1974 [29 June 1973 (2)] 19275/74 Heading G4R An arrangement for recognizing the merger of two lines in a pattern, e.g. a printed circuit or a minutia consisting of two merging ridge lines or of a ridge end defined by two merging interridge spaces in a fingerprint, includes a logic matrix comprising an array of cells which are operative to form conductive paths from the centre of the matrix to its periphery, the disposition of the paths corresponding to the' disposition of the lines in the pattern. Outputs from the peripheral cells are used to identify the presence of a merger. The output of a scanner viewing the pattern is digitized and passed to shift register stores which deliver, in true and inverse form, signals representative of the portion of the pattern appearing in a notional 12 x 12 bit window moving over the pattern. The true signals pass to a logic matrix comprising a 12 Î 12 array of cells as indicated in Fig. 2. Each cell is such that it provides an output to its neighbours if it receives an input from a neighbour and from a pattern part. Fig. 2 shows by the black dots those cells which provide an output when a minutia consisting of merging ridges is present in the window. The operated cells form continuous paths from the 4 central cells, connected to voltage source V, to certain peripheral cells. The inverse signals pass to a second logic matrix which performs a similar function, Fig. 3. The outputs from the 44 peripheral cells of the first matrix pass to a circuit (Fig. 6, not shown) which determines whether there are three separate groups of 1-bits and which, if this is so, gives an output indicating the presence of a 3-armed minutia. The output is inhibited if the number of 1-bits in any group exceeds, for example 5 so that a minutia not yet clearly positioned in the window is not recognized and so that excessively wide arms are rejected. The 44 outputs of the second matrix are used in a similar manner to recognize the presence of the split between the ridges. If both a split and a 3-armed minutia are recognized a signal indicating that a minutia is present in the window is generated, and may be used to store the coordinates of the minutia. In order to prevent recognition of a minutia more than once as it passes through the window the outputs of a symmetrically-placed cruciform array (Fig. 11, not shown) of 28 of the cells of the second matrix, together with a signal indicative of the quadrant in which the split lies, are passed to a circuit (Fig. 10, not shown) which prevents read-out of the co-ordinates except when the minutia is first recognized.
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