METHOD OF FABRICATING A SELF-ALIGNED METAL- SEMICONDUCTOR FET

    公开(公告)号:CA1266812A

    公开(公告)日:1990-03-20

    申请号:CA508352

    申请日:1986-05-05

    Applicant: IBM

    Abstract: Method of Fabricating a Self-Aligned Metal-Semiconductor FET A method for the fabrication of self-aligned MESFET structures (30) with a recessed refractory submicron gate. After channel formation (32) on a SI substrate (31), which may consist of a III-V compound semiconductor such as GaAs, with subsequent annealing the refractory gate (33G) is deposited and patterned. This is followed by the overgrowth of a highly doped contact layer of e.g. GaAs using MOCVD or MBE processes resulting in poly-cry-stalline material over the gate "mask" and in mono-cry-stalline material (34S, 34D) on exposed semiconductor surfaces. Next, the poly-crystalline material is removed in a selective etch process, this step being followed by the deposition of source and drain electrodes (35S, 35D). In order to further improve process reliability, insulating sidewalls (43-43) can be provided at the vertical edges of the gate (33G) to avoid source-gate and draingate shorts.

    FIELD-EFFECT DEVICE WITH A SUPERCONDUCTING CHANNEL

    公开(公告)号:CA1315015C

    公开(公告)日:1993-03-23

    申请号:CA582214

    申请日:1988-11-03

    Applicant: IBM

    Abstract: SZ 9-87-012 A Field-Effect Device with a Superconducting Channel. A field-effect structure, formed on a substrate (20) and comprising a channel (21) with source (22) and drain (23) as well as a gate (25) that is separated from the channel by an insulating layer (24). The channel is made of a high-Tc metal-oxide superconductor, e.g., YBaCuO, having a carrier density of about 1021/cm3 and a correlation length of about .2 nm. The channel thickness is in the order of 1 nm, it is single crystalline and oriented such that the superconducting behaviour is strongest in the plane parallel to the substrate. With a signal of a few Volt applied to the gate, the entire channel cross-section is depleted of charge carriers whereby the channel resistance can be switched between "zero" (undepleted, superconducting) and "very high" (depleted).

    LARGE SCALE HIGH RESOLUTION LIQUID CRYSTAL DISPLAY AND METHOD FOR PRODUCTION THEREOF

    公开(公告)号:CA1241726A

    公开(公告)日:1988-09-06

    申请号:CA477747

    申请日:1985-03-28

    Applicant: IBM

    Abstract: LARGE SCALE HIGH RESOLUTION LIQUID CRYSTAL DISPLAY AND METHOD FOR PRODUCTION THEREOF A matrix addressable liquid crystal display includes a thin film circuit supported on a substrate having a plurality of parallel bit lines. A plurality of individual pixel circuits each include a two terminal bi-directional gate device which is formed from at least one thin film layer with one gate device terminal connected with the associated bit line. A terminal plate is connected in circuit with the other terminal of the gate device. A transparent cover plate is spaced above the thin film circuit with a transparent conductor structure on the underside of the cover plate. The space beneath the cover plate is filled with a liquid crystal display material to form individual display pixel circuits at the terminal plates. A plurality of parallel word lines are arranged orthogonally to, and insulated from, the bit lines. The word lines are connected in circuit with the individual display pixel circuits at the respective cross-overs with the bit lines. The pixel circuits are each operable to change the state of the associated portion of the liquid crystal display material in response to the concurrent application of voltage pulses of opposite polarities to the associated word and bit lines.

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