公开(公告)号：JP2003195989A

公开(公告)日：2003-07-11

申请号：JP2001395302

申请日：2001-12-26

Applicant: IBM

Inventor： YAMAZAKI MITSUHIRO ,  ODAOHARA SHIGEFUMI ,  HAGIWARA MIKIO

IPC: G06F1/32

Abstract: PROBLEM TO BE SOLVED: To reduce standby electric power in a computer device for supporting the wake-up function. SOLUTION: This computer device has a CMOS 64 for storing valid or invalid information on the wake-up function capable of rising a system by operation from a remote place, a PM BIOS 62 for controlling a gate array 66 by confirming the valid or invalid information stored in this CMOS 64 at shutdown request time for the system, and a switch 67 for turning on and off supply of electric power from an auxiliary power source on the basis of indication of the gate array 66, and determines whether or not respective devices such as a mini PCI card 28 and a communication card 48 can realize the wake-up function. The switch 67 turns on and off the supply of the electric power from the auxiliary power source at power-off time with every device. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2001092565A

公开(公告)日：2001-04-06

申请号：JP26199899

申请日：1999-09-16

Applicant: IBM

Inventor： YAMAZAKI MITSUHIRO

IPC: G06F1/30 ,  G06F1/00 ,  G06F1/24 ,  G06F1/26

Abstract: PROBLEM TO BE SOLVED: To materialize the execution of a prescribed processing immediately before turning off a power supply for a computer without increasing the load or the like. SOLUTION: A shutdown reset logic 52 is connected between a power supply management part 68 in a core chip and a power supply circuit 54. The logic 52 is enabled immediately before the shutdown of a system, interrupts the input of a power OFF signal SUSC outputted from the management part 68 to the circuit 54, inputs a signal LAST#PWG#PIIX4 expressing the defect state of the power supply to the management part 68 to generate hardware reset, and inputs a signal PERSW#PIIX4 expressing the ON of a power supply switch 92. Thereby, a POST is started and the POST enables the WOL function of a network adaptor and then turns off the power supply of the system.

公开(公告)号：JP2006048175A

公开(公告)日：2006-02-16

申请号：JP2004224685

申请日：2004-07-30

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： YAMAZAKI MITSUHIRO ,  MATSUSHIMA SHINJI ,  TSUKAMOTO YASUMICHI

IPC: G06F1/32 ,  G06F1/00

CPC classification number: G06F1/3203 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

Abstract: PROBLEM TO BE SOLVED: To reduce lowering in processing performance due to control for reducing heat generation. SOLUTION: An information processor is provided with: a plurality of devices each having a high power mode in which power consumption and a processing speed are a higher operation mode and a low power mode in which power consumption and a processing speed are a lower operation mode than the high power mode; a measuring part for measuring the temperature of a predetermined measurement part; a selecting part for selecting a device minimizing the lowering in the processing performance which occurs when the operation mode is changed from the high power mode to the low power mode when the measured temperature is not less than a predetermined reference temperature, resulting in a decrease in the temperature of the measurement part; and an operation mode setting part for changing the operation mode of the selected device from the high power mode to the lower power mode. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：为了减少由于减少发热的控制而降低加工性能。 解决方案：信息处理器提供有：多个设备，每个设备具有高功率模式，其中功耗和处理速度是较高的操作模式和低功耗模式，其中功耗和处理速度为 操作模式比高功率模式低; 用于测量预定测量部件的温度的测量部件; 选择部件，用于选择当测量温度不低于预定参考温度时将操作模式从高功率模式改变为低功率模式时发生的处理性能降低最小化的装置，导致减少 测量部件的温度; 以及用于将所选择的装置的操作模式从高功率模式改变为较低功率模式的操作模式设置部分。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2004192350A

公开(公告)日：2004-07-08

申请号：JP2002359826

申请日：2002-12-11

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： YAMAZAKI MITSUHIRO ,  MATSUSHIMA SHINJI ,  TSUKAMOTO HIDESHI ,  KATO ATSUYUKI

IPC: G06F1/32 ,  G06F1/26

CPC classification number: G06F1/26

Abstract: PROBLEM TO BE SOLVED: To reduce power consumption at shutdown time in a computer device with a battery. SOLUTION: This computer device includes an AC adapter constituted connectably to a computer system by a power supply circuit 50 of the computer system and supplying a power to the system, a main battery 57 and a second battery 58 constituted connectably to the computer system and supplying the power to the system by discharging after charging by the power from the AC adapter 51, and a gate array circuit 62 turning off the power supply to a charger 56, or a charge circuit of the main battery 57 and/or the second battery 58, and an embedded controller 63, when the main battery 57 and/or the second battery 58 is connected to the AC adapter 51. COPYRIGHT: (C)2004,JPO&NCIPI

Abstract translation: 要解决的问题：在具有电池的计算机设备中减少关机时的功耗。

解决方案：该计算机装置包括通过计算机系统的电源电路50可连接到计算机系统的AC适配器并向系统供电，主电池57和第二电池58，其可连接到计算机 系统，并且通过来自AC适配器51的电力对充电后的放电来向系统供电，以及门阵列电路62关闭到充电器56的电源或主电池57的充电电路和/或 第二电池58和嵌入式控制器63，当主电池57和/或第二电池58连接到AC适配器51.版权所有（C）2004，JPO＆NCIPI

公开(公告)号：JP2002351585A

公开(公告)日：2002-12-06

申请号：JP2001153156

申请日：2001-05-22

Applicant: IBM

Inventor： KATO ATSUYUKI ,  FUJII KAZUO ,  YAMAZAKI MITSUHIRO ,  HAGIWARA MIKIO

IPC: G06F1/32

Abstract: PROBLEM TO BE SOLVED: To reduce power consumption when a computer with a mini PCI card or a device corresponding to the mini PCI card inserted thereinto is in an inactive state. SOLUTION: An I/O bridge 21 for outputting inactive information about whether or not a computer system is in an inactive state and a Vaux off at sleep resister 42d holding information about whether or not to feed auxiliary power VccAUX to a mini PCI device 60 when the computer system is inactive, are provided. When a signal from the I/O bridge 21 is L and a signal from the register 42d is L, the feeding of the auxiliary power VccAUX is stopped from a DC/DC converter 55.

公开(公告)号：JP2001051756A

公开(公告)日：2001-02-23

申请号：JP21373199

申请日：1999-07-28

Applicant: IBM

Inventor： HORIKOSHI HIDETO ,  YAMAZAKI MITSUHIRO ,  MARUICHI TOMOKI ,  SUZUKI KEIJI ,  OIE MASAKI

IPC: G06F1/26

Abstract: PROBLEM TO BE SOLVED: To easily realize information communication even if a computer is operated at an energy saving mode where power consumption is suppressed. SOLUTION: In the power-on method, an RF data reception program is executed by the supply of the power of a computer. A high level signal equivalent to a signal outputted when AC power is detected through an OR element 79 in setting for validating a power-on function is outputted. A power-on circuit 75 controls a regulator circuit 69 and outputs power voltage. A power controller 45 conducts an FET switch 35 through a power switch controller 48 and supplies power to an RF module 33. At the time of a power saving mode, a Wake UP signal is outputted from the RF module 33 and the power controller 45 turns on power. The power-on circuit 75 controls the regulator circuit 69, outputs power voltage and turns on power through a detection circuit 83 even at the time of a minimum power operation.

公开(公告)号：JP2001043142A

公开(公告)日：2001-02-16

申请号：JP20534699

申请日：1999-07-19

Applicant: IBM

Inventor： HORIKOSHI HIDETO ,  YAMAZAKI MITSUHIRO ,  TANAKA JUN

IPC: G06F12/14 ,  G06F1/00 ,  G06F21/00 ,  G06F21/06 ,  G06F21/24

Abstract: PROBLEM TO BE SOLVED: To inhibit access to a computer when the security device of a computer with a security function is illegally detached. SOLUTION: When the computer is powered ON, a POST program is executed and in the setting which makes the security function effective, an RFID chip 33 holds Removal Detect Enable at high level and outputs it to the control side of an analog switch 67 and one input side of a NAND element 63. A 1st short-circuit element 36 is isolated by the attachment or detachment of an RF antenna 37 to disconnect terminals 71 and 73 and an INTR signal of keyboard inhibition is outputted with the high-level signal of the element 63, inhibiting access to the computer. When the power source is OFF and the RF antenna is attached or detached, an analog switch 67 is turned OFF to cut off the electric power from a lithium battery to a CMOS memory 50, thereby inhibiting access to the computer.

公开(公告)号：JPH09160724A

公开(公告)日：1997-06-20

申请号：JP31641495

申请日：1995-12-05

Applicant: IBM

Inventor： MATSUSHIMA SHINJI ,  YAMAZAKI MITSUHIRO

IPC: G06F3/06 ,  G06F13/40

Abstract: PROBLEM TO BE SOLVED: To automatically and accurately specify respective hard disk drives(HDD) according to their connection state by providing a 1st and a 2nd connector which connect the HDDs and giving priority to the 1st connector when a master and a slave HDD are specified. SOLUTION: A personal computer PC is equipped with the 1st and 2nd connectors 10 and 20 for connecting the HDDs 30. The connectors 10 and 20 have -M/S pins 11 and 21 for setting the connected HDDs 30 as a master or slave and DETECT pins 12 and 22 for detecting whether or not the HDDs 30 are connected. The -M/S pin 11 of the 1st connector 10 is held at a 1st voltage level for setting the connected HDD 30-a as the master. Further, the -M/S pin 21 of the 2nd connector 20 is held at a 2nd voltage for setting the connected HDD 30-b as the slave when the HDD 30-a is connected to the 1st connector 10 and also held at the 1st voltage unless the HDD 30-a is connected to the 1st connector 10.