公开(公告)号：DE10305618B4

公开(公告)日：2007-10-11

申请号：DE10305618

申请日：2003-02-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOETSCHKES UDO ,  MOELLER HOLGER ,  ROGALLI MICHAEL ,  REB ALEXANDER ,  TRINOWITZ REINER

IPC: G03F7/20 ,  G03F1/00 ,  G03F1/08 ,  G03F7/00 ,  G03F7/09 ,  G03F7/095

公开(公告)号：DE10154981A1

公开(公告)日：2003-05-15

申请号：DE10154981

申请日：2001-10-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： KRAUSE GERD ,  TRINOWITZ REINER ,  LAESSIG ANTJE ,  LANGNICKEL HEIKE ,  FROEHLICH HANS-GEORG ,  KOWALEWSKI JOHANNES ,  GOETSCHKES UDO ,  HUEBINGER FRANK

IPC: H01L23/544 ,  H01L21/8242

Abstract: A mark configuration for the alignment and/or determination of a relative position of at least two planes in relation to one another in a substrate and/or in layers on a substrate during lithographic exposure, in particular, in the case of a wafer during the production of DRAMs, includes a mark structure, and at least one layer of a definable thickness underneath the mark structure for adjusting the physical position of the mark structure relative to a reference plane in or on the substrate. Also provided is a wafer having such a configuration and a process for providing such a configuration. The invention allows a mark configuration to have mark structures exhibiting good contrast regardless of the design or the process conditions.

公开(公告)号：DE10305618A1

公开(公告)日：2004-09-09

申请号：DE10305618

申请日：2003-02-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： GOETSCHKES UDO ,  MOELLER HOLGER ,  ROGALLI MICHAEL ,  REB ALEXANDER ,  TRINOWITZ REINER

IPC: G03F1/00 ,  G03F1/08 ,  G03F7/00 ,  G03F7/09 ,  G03F7/095 ,  G03F7/20

Abstract: On semiconductor wafer (1) is formed layer (2), whose surface (4) has at least one depression (6). On surface is deposited first photosensitive lacquer (7), filling depression. First lacquer is exposed on surface and above depression, with lacquer in depression not exposed. First lacquer is developed and photosensitive second lacquer (9) is deposited on wafer and is again exposed with structure pattern. First exposition is carried out with radiation doses sufficient to expose surface after development. INDEPENDENT CLAIM is included for use of method in manufacture of semiconductor memory.